Merge branch 'feature/support_7.2.8_soc/pvt-dig' into 'master'

rtc: auto adjust LDO voltage based on pvt-dig saved in efuse

Closes IDF-4873

See merge request espressif/esp-idf!16365
This commit is contained in:
Michael (XIAO Xufeng)
2022-08-22 11:43:07 +08:00
7 changed files with 266 additions and 34 deletions

View File

@@ -126,6 +126,22 @@ set sleep_init default param
#define RTC_CNTL_DG_VDD_DRV_B_SLP_DEFAULT 0xf
/*
The follow value is used to get a reasonable rtc voltage dbias value according to digital dbias & some other value
storing in efuse
*/
#define K_RTC_MID_MUL10000 198
#define K_DIG_MID_MUL10000 211
#define V_RTC_MID_MUL10000 10181
#define V_DIG_MID_MUL10000 10841
/*
set LDO slave during CPU switch
*/
#define DEFAULT_LDO_SLAVE 0x7
/**
* @brief Possible main XTAL frequency values.
*

View File

@@ -3683,6 +3683,9 @@ ork.*/
#define RTC_CNTL_DISABLE_RTC_CPU_V 0x1
#define RTC_CNTL_DISABLE_RTC_CPU_S 31
/*
Due to the LDO slaves, RTC_CNTL_DATE_REG[18:13] can only be used for LDO adjustment.
*/
#define RTC_CNTL_DATE_REG (DR_REG_RTCCNTL_BASE + 0x1FC)
/* RTC_CNTL_DATE : R/W ;bitpos:[27:0] ;default: 28'h2101271 ; */
/*description: .*/
@@ -3690,7 +3693,12 @@ ork.*/
#define RTC_CNTL_DATE_M ((RTC_CNTL_DATE_V)<<(RTC_CNTL_DATE_S))
#define RTC_CNTL_DATE_V 0xFFFFFFF
#define RTC_CNTL_DATE_S 0
/*LDO SLAVE : R/W ;bitpos:[18:13] ; default: 6'd0 ;*/
/*description: .*/
#define RTC_CNTL_SLAVE_PD 0x0000003F
#define RTC_CNTL_SLAVE_PD_M ((RTC_CNTL_SLAVE_V)<<(RTC_CNTL_SLAVE_S))
#define RTC_CNTL_SLAVE_PD_V 0x3F
#define RTC_CNTL_SLAVE_PD_S 13
#ifdef __cplusplus
}