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fix(mmap): fixed cache2phys and phy2cache not patched when XIP on PSRAM

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Xiao Xufeng
2025-01-31 19:17:40 +08:00
committed by Michael (XIAO Xufeng)
parent 477af3b4a8
commit e97b1a8b51
5 changed files with 20 additions and 8 deletions
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docs/en/api-reference/peripherals/spi_flash/spi_flash_idf_vs_rom.rst
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@@ -24,6 +24,8 @@ Feature Supported by ESP-IDF but Not in Chip-ROM
- :ref:`CONFIG_SPI_FLASH_DANGEROUS_WRITE`, enabling this option checks for flash programming to certain protected regions like bootloader, partition table or application itself.
- :ref:`CONFIG_SPI_FLASH_ENABLE_COUNTERS`, enabling this option to collect performance data for ESP-IDF SPI flash driver APIs.
- :ref:`CONFIG_SPI_FLASH_AUTO_SUSPEND`, enabling this option to automatically suspend or resume a long flash operation when short flash operation happens. Note that this feature is an optional feature, please do read :ref:`auto-suspend-intro` for more limitations.
:ESP_ROM_HAS_SPI_FLASH_MMAP and SOC_SPIRAM_XIP_SUPPORTED and not esp32s3: - :ref:`CONFIG_SPIRAM_XIP_FROM_PSRAM`, enabling this option allows you to use external PSRAM as instruction cache and read-only data cache. Some functions in the ROM don't support this usage, and a ESP-IDF version of these functions is provided.
:esp32s3: - :ref:`CONFIG_SPIRAM_FETCH_INSTRUCTIONS` and :ref:`CONFIG_SPIRAM_RODATA`, enabling these options allows you to use external PSRAM as instruction cache and read-only data cache. Some functions in the ROM don't support this usage, and a ESP-IDF version of these functions is provided.
Bugfixes Introduced in ESP-IDF but Not in Chip-ROM
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