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Merge branch 'refactor/rtcio_caps_responsibility' into 'master'

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refactor(driver/rtcio): Re-wrap RTCIO APIs with more accurate soc_caps

Closes IDF-7406

See merge request espressif/esp-idf!24522
This commit is contained in:
Song Ruo Jing
2023-07-07 14:25:47 +08:00
parent c3e5f05622 4985caa38f
commit ea48030514
22 changed files with 317 additions and 107 deletions
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2
components/driver/gpio/gpio.c
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@@ -360,7 +360,7 @@ esp_err_t gpio_config(const gpio_config_t *pGPIOConfig)
if (((gpio_pin_mask >> io_num) & BIT(0))) {
assert(io_reg != (intptr_t)NULL);
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
#if SOC_RTCIO_PIN_COUNT > 0
if (rtc_gpio_is_valid_gpio(io_num)) {
rtc_gpio_deinit(io_num);
}

45
components/driver/gpio/include/driver/rtc_io.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -28,7 +28,7 @@ bool rtc_gpio_is_valid_gpio(gpio_num_t gpio_num);
#define RTC_GPIO_IS_VALID_GPIO(gpio_num) rtc_gpio_is_valid_gpio(gpio_num)
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
#if SOC_RTCIO_PIN_COUNT > 0
/**
* @brief Get RTC IO index number by gpio number.
*
@@ -63,6 +63,7 @@ esp_err_t rtc_gpio_init(gpio_num_t gpio_num);
*/
esp_err_t rtc_gpio_deinit(gpio_num_t gpio_num);
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
/**
* @brief Get the RTC IO input level
*
@@ -243,24 +244,6 @@ esp_err_t rtc_gpio_hold_en(gpio_num_t gpio_num);
*/
esp_err_t rtc_gpio_hold_dis(gpio_num_t gpio_num);
/**
* @brief Helper function to disconnect internal circuits from an RTC IO
* This function disables input, output, pullup, pulldown, and enables
* hold feature for an RTC IO.
* Use this function if an RTC IO needs to be disconnected from internal
* circuits in deep sleep, to minimize leakage current.
*
* In particular, for ESP32-WROVER module, call
* rtc_gpio_isolate(GPIO_NUM_12) before entering deep sleep, to reduce
* deep sleep current.
*
* @param gpio_num GPIO number (e.g. GPIO_NUM_12).
* @return
* - ESP_OK on success
* - ESP_ERR_INVALID_ARG if GPIO is not an RTC IO
*/
esp_err_t rtc_gpio_isolate(gpio_num_t gpio_num);
/**
* @brief Enable force hold signal for all RTC IOs
*
@@ -279,6 +262,26 @@ esp_err_t rtc_gpio_force_hold_dis_all(void);
#endif // SOC_RTCIO_HOLD_SUPPORTED
#if SOC_RTCIO_HOLD_SUPPORTED && SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
/**
* @brief Helper function to disconnect internal circuits from an RTC IO
* This function disables input, output, pullup, pulldown, and enables
* hold feature for an RTC IO.
* Use this function if an RTC IO needs to be disconnected from internal
* circuits in deep sleep, to minimize leakage current.
*
* In particular, for ESP32-WROVER module, call
* rtc_gpio_isolate(GPIO_NUM_12) before entering deep sleep, to reduce
* deep sleep current.
*
* @param gpio_num GPIO number (e.g. GPIO_NUM_12).
* @return
* - ESP_OK on success
* - ESP_ERR_INVALID_ARG if GPIO is not an RTC IO
*/
esp_err_t rtc_gpio_isolate(gpio_num_t gpio_num);
#endif // SOC_RTCIO_HOLD_SUPPORTED && SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
#if SOC_RTCIO_WAKE_SUPPORTED
/**
@@ -304,6 +307,8 @@ esp_err_t rtc_gpio_wakeup_disable(gpio_num_t gpio_num);
#endif // SOC_RTCIO_WAKE_SUPPORTED
#endif // SOC_RTCIO_PIN_COUNT > 0
#ifdef __cplusplus
}
#endif

58
components/driver/gpio/rtc_io.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -13,6 +13,7 @@
#include "freertos/timers.h"
#include "driver/rtc_io.h"
#include "hal/rtc_io_hal.h"
#include "soc/rtc_io_periph.h"
#include "soc/soc_caps.h"
static const char __attribute__((__unused__)) *RTCIO_TAG = "RTCIO";
@@ -21,11 +22,24 @@ extern portMUX_TYPE rtc_spinlock; //TODO: Will be placed in the appropriate posi
#define RTCIO_ENTER_CRITICAL() portENTER_CRITICAL(&rtc_spinlock)
#define RTCIO_EXIT_CRITICAL() portEXIT_CRITICAL(&rtc_spinlock)
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
bool rtc_gpio_is_valid_gpio(gpio_num_t gpio_num)
{
#if SOC_RTCIO_PIN_COUNT > 0
return (gpio_num < GPIO_PIN_COUNT && rtc_io_num_map[gpio_num] >= 0);
#else
return false;
#endif
}
#if SOC_RTCIO_PIN_COUNT > 0
/*---------------------------------------------------------------
RTC IO
---------------------------------------------------------------*/
int rtc_io_number_get(gpio_num_t gpio_num)
{
return rtc_io_num_map[gpio_num];
}
esp_err_t rtc_gpio_init(gpio_num_t gpio_num)
{
ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
@@ -47,6 +61,7 @@ esp_err_t rtc_gpio_deinit(gpio_num_t gpio_num)
return ESP_OK;
}
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
esp_err_t rtc_gpio_set_level(gpio_num_t gpio_num, uint32_t level)
{
ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
@@ -177,16 +192,6 @@ esp_err_t rtc_gpio_hold_dis(gpio_num_t gpio_num)
return ESP_OK;
}
esp_err_t rtc_gpio_isolate(gpio_num_t gpio_num)
{
ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
RTCIO_ENTER_CRITICAL();
rtcio_hal_isolate(rtc_io_number_get(gpio_num));
RTCIO_EXIT_CRITICAL();
return ESP_OK;
}
esp_err_t rtc_gpio_force_hold_en_all(void)
{
RTCIO_ENTER_CRITICAL();
@@ -206,6 +211,18 @@ esp_err_t rtc_gpio_force_hold_dis_all(void)
}
#endif // SOC_RTCIO_HOLD_SUPPORTED
#if SOC_RTCIO_HOLD_SUPPORTED && SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
esp_err_t rtc_gpio_isolate(gpio_num_t gpio_num)
{
ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
RTCIO_ENTER_CRITICAL();
rtcio_hal_isolate(rtc_io_number_get(gpio_num));
RTCIO_EXIT_CRITICAL();
return ESP_OK;
}
#endif // SOC_RTCIO_HOLD_SUPPORTED && SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
#if SOC_RTCIO_WAKE_SUPPORTED
esp_err_t rtc_gpio_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type)
@@ -231,19 +248,4 @@ esp_err_t rtc_gpio_wakeup_disable(gpio_num_t gpio_num)
#endif // SOC_RTCIO_WAKE_SUPPORTED
bool rtc_gpio_is_valid_gpio(gpio_num_t gpio_num)
{
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
return (gpio_num < GPIO_PIN_COUNT && rtc_io_num_map[gpio_num] >= 0);
#else
return false;
#endif
}
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
int rtc_io_number_get(gpio_num_t gpio_num)
{
return rtc_io_num_map[gpio_num];
}
#endif // SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
#endif // SOC_RTCIO_PIN_COUNT > 0

2
components/driver/test_apps/gpio/main/CMakeLists.txt
View File

@@ -5,7 +5,7 @@ if(CONFIG_SOC_SDM_SUPPORTED)
list(APPEND srcs "test_sigma_delta_legacy.c")
endif()
if(CONFIG_SOC_RTCIO_INPUT_OUTPUT_SUPPORTED)
if(CONFIG_SOC_RTCIO_PIN_COUNT GREATER 0)
list(APPEND srcs "test_rtcio.c")
endif()

34
components/driver/test_apps/gpio/main/test_rtcio.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -17,12 +17,6 @@
#include "esp_log.h"
#include "soc/rtc_io_periph.h"
#define RTCIO_CHECK(condition) TEST_ASSERT_MESSAGE((condition == ESP_OK), "ret is not ESP_OK")
#define RTCIO_VERIFY(condition, msg) TEST_ASSERT_MESSAGE((condition), msg)
#define TEST_COUNT 10
static const char *TAG = "rtcio_test";
#ifdef CONFIG_IDF_TARGET_ESP32
// The input-only rtcio pins do not have pull-up/down resistors (not support pull-up/down)
#define RTCIO_SUPPORT_PU_PD(num) (rtc_io_desc[num].pullup != 0)
@@ -117,8 +111,27 @@ const int s_test_map[TEST_GPIO_PIN_COUNT] = {
GPIO_NUM_6, //GPIO6
GPIO_NUM_7, //GPIO7
};
#elif CONFIG_IDF_TARGET_ESP32H2
#define TEST_GPIO_PIN_COUNT 8
const int s_test_map[TEST_GPIO_PIN_COUNT] = {
GPIO_NUM_7, //GPIO7
GPIO_NUM_8, //GPIO8
GPIO_NUM_9, //GPIO9
GPIO_NUM_10, //GPIO10
GPIO_NUM_11, //GPIO11
GPIO_NUM_12, //GPIO12
GPIO_NUM_13, //GPIO13
GPIO_NUM_14, //GPIO14
};
#endif
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
static const char *TAG = "rtcio_test";
#define RTCIO_CHECK(condition) TEST_ASSERT_MESSAGE((condition == ESP_OK), "ret is not ESP_OK")
#define TEST_COUNT 10
/*
* Test output/input function.
*/
@@ -325,10 +338,13 @@ TEST_CASE("RTCIO_output_hold_test", "[rtcio]")
}
ESP_LOGI(TAG, "RTCIO hold test over");
}
#endif //SOC_RTCIO_HOLD_SUPPORTED
#endif //SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
#if !CONFIG_IDF_TARGET_ESP32H2 // TODO: IDF-6268
// It is not necessary to test every rtcio pin, it will take too much ci testing time for deep sleep
// Only tests on s_test_map[TEST_RTCIO_DEEP_SLEEP_PIN_INDEX] pin
// (ESP32: IO25, ESP32S2, S3: IO6, C6: IO5) these pads' default configuration is low level
// (ESP32: IO25, ESP32S2, S3: IO6, C6: IO5, H2: IO12) these pads' default configuration is low level
#define TEST_RTCIO_DEEP_SLEEP_PIN_INDEX 5
static void rtcio_deep_sleep_hold_test_first_stage(void)
@@ -374,4 +390,4 @@ static void rtcio_deep_sleep_hold_test_second_stage(void)
TEST_CASE_MULTIPLE_STAGES("RTCIO_deep_sleep_output_hold_test", "[rtcio]",
rtcio_deep_sleep_hold_test_first_stage,
rtcio_deep_sleep_hold_test_second_stage)
#endif //SOC_RTCIO_HOLD_SUPPORTED
#endif

1
components/driver/test_apps/gpio/pytest_gpio.py
View File

@@ -33,6 +33,7 @@ def test_legacy_sigma_delta(dut: IdfDut) -> None:
@pytest.mark.esp32s2
@pytest.mark.esp32s3
@pytest.mark.esp32c6
@pytest.mark.esp32h2
@pytest.mark.generic
@pytest.mark.parametrize('config', CONFIGS, indirect=True)
def test_rtc_io(dut: IdfDut) -> None: