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feat(sd): added power control driver and implementation layer with ldo
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@@ -967,6 +967,10 @@ config SOC_SDMMC_DELAY_PHASE_NUM
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int
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default 4
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config SOC_SDMMC_IO_POWER_EXTERNAL
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bool
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default y
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config SOC_SHA_DMA_MAX_BUFFER_SIZE
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int
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default 3968
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@@ -396,6 +396,7 @@
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#define SOC_SDMMC_NUM_SLOTS 2
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/* Supported host clock delay phase number */
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#define SOC_SDMMC_DELAY_PHASE_NUM 4
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#define SOC_SDMMC_IO_POWER_EXTERNAL 1 ///< SDMMC IO power controlled by external power supply
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// TODO: IDF-5353 (Copy from esp32c3, need check)
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/*--------------------------- SHA CAPS ---------------------------------------*/
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