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fix(gpio): IO7 is not a LP IO anymore on C5 ECO2 chip

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This commit is contained in:
Song Ruo Jing
2025-04-10 18:08:37 +08:00
parent 0f1fd5a20c
commit ec5176e95a
21 changed files with 4822 additions and 6563 deletions
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14
components/hal/esp32c5/include/hal/rtc_io_ll.h
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@@ -101,7 +101,7 @@ static inline void rtcio_ll_function_select(int rtcio_num, rtcio_ll_func_t func)
*/
static inline void rtcio_ll_output_enable(int rtcio_num)
{
HAL_FORCE_MODIFY_U32_REG_FIELD(LP_GPIO.enable_w1ts, out_enable_w1ts, BIT(rtcio_num));
LP_GPIO.enable_w1ts.enable_w1ts = BIT(rtcio_num);
}
/**
@@ -111,7 +111,7 @@ static inline void rtcio_ll_output_enable(int rtcio_num)
*/
static inline void rtcio_ll_output_disable(int rtcio_num)
{
HAL_FORCE_MODIFY_U32_REG_FIELD(LP_GPIO.enable_w1tc, out_enable_w1tc, BIT(rtcio_num));
LP_GPIO.enable_w1tc.enable_w1tc = BIT(rtcio_num);
}
/**
@@ -123,9 +123,9 @@ static inline void rtcio_ll_output_disable(int rtcio_num)
static inline void rtcio_ll_set_level(int rtcio_num, uint32_t level)
{
if (level) {
HAL_FORCE_MODIFY_U32_REG_FIELD(LP_GPIO.out_w1ts, out_data_w1ts, BIT(rtcio_num));
LP_GPIO.out_w1ts.out_w1ts = BIT(rtcio_num);
} else {
HAL_FORCE_MODIFY_U32_REG_FIELD(LP_GPIO.out_w1tc, out_data_w1tc, BIT(rtcio_num));
LP_GPIO.out_w1tc.out_w1tc = BIT(rtcio_num);
}
}
@@ -157,7 +157,7 @@ static inline void rtcio_ll_input_disable(int rtcio_num)
*/
static inline uint32_t rtcio_ll_get_level(int rtcio_num)
{
return (uint32_t)(HAL_FORCE_READ_U32_REG_FIELD(LP_GPIO.in, in_data_next) >> rtcio_num) & 0x1;
return (LP_GPIO.in.in_data_next >> rtcio_num) & 0x1;
}
/**
@@ -428,7 +428,7 @@ static inline bool rtcio_ll_wakeup_is_enabled(int rtcio_num)
*/
static inline uint32_t rtcio_ll_get_interrupt_status(void)
{
return (uint32_t)HAL_FORCE_READ_U32_REG_FIELD(LP_GPIO.status, status_interrupt);
return LP_GPIO.status.status_interrupt;
}
/**
@@ -436,7 +436,7 @@ static inline uint32_t rtcio_ll_get_interrupt_status(void)
*/
static inline void rtcio_ll_clear_interrupt_status(void)
{
HAL_FORCE_MODIFY_U32_REG_FIELD(LP_GPIO.status_w1tc, status_intr_w1tc, 0xff);
LP_GPIO.status_w1tc.status_w1tc = 0x7F;
}
#ifdef __cplusplus