From ec85de2beceed7deda26b2b5ef678e249df4231a Mon Sep 17 00:00:00 2001 From: Konstantin Kondrashov Date: Thu, 20 Nov 2025 12:38:30 +0200 Subject: [PATCH] fix(examples): Fix IPC ISR RISC-V test for ESP32-P4 rev3 Remove checks for MSTATUS and MCAUSE values that may vary in different chip revisions. --- examples/system/ipc/ipc_isr/riscv/pytest_ipc_isr_riscv.py | 4 ---- 1 file changed, 4 deletions(-) diff --git a/examples/system/ipc/ipc_isr/riscv/pytest_ipc_isr_riscv.py b/examples/system/ipc/ipc_isr/riscv/pytest_ipc_isr_riscv.py index 81d9f50a79..e3d94758e5 100644 --- a/examples/system/ipc/ipc_isr/riscv/pytest_ipc_isr_riscv.py +++ b/examples/system/ipc/ipc_isr/riscv/pytest_ipc_isr_riscv.py @@ -7,15 +7,11 @@ from pytest_embedded_idf.utils import idf_parametrize @pytest.mark.generic @idf_parametrize('target', ['esp32p4'], indirect=['target']) -@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14423') def test_ipc_isr_riscv(dut: Dut) -> None: dut.expect_exact('example: Start') - dut.expect_exact('example: MSTATUS = 0x11880') dut.expect_exact('example: in[0] = 0x1') dut.expect_exact('example: in[1] = 0x2') dut.expect_exact('example: in[2] = 0x3') dut.expect_exact('example: out[0] = (in[0] | in[1] | in[2]) = 0x3') dut.expect_exact('example: out[1] = (in[0] + in[1] + in[2]) = 0x6') - dut.expect_exact('example: out[2] = MCAUSE of other cpu = 0xb800002c') - dut.expect_exact('example: out[3] = MSTATUS of other cpu = 0x11880') dut.expect_exact('example: End')