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feat(panic): base support on p4

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This commit is contained in:
Armando
2023-07-19 16:28:03 +08:00
committed by Armando (Dou Yiwen)
parent 5986e63c47
commit ecf1461f1c
2 changed files with 15 additions and 5 deletions
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9
components/riscv/include/esp_private/panic_reason.h
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@@ -1,13 +1,18 @@
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include "soc/soc.h"
/* Since riscv does not replace mcause with "pseudo_reason" as it xtensa does
* PANIC_RSN_* defined with original interrupt numbers to make it work in
* common code
*/
#define PANIC_RSN_INTWDT_CPU0 ETS_INT_WDT_INUM
//TODO: IDF-7511
#if SOC_CPU_CORES_NUM > 1
#define PANIC_RSN_INTWDT_CPU1 ETS_INT_WDT_INUM
#endif
#define PANIC_RSN_CACHEERR 3