alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2025-09-13 01:32:21 +00:00
Code Issues Packages Projects Releases Wiki Activity

ESP32C3: auto adjust voltage dbias storing in efuse and open glitch reset for ECO3

Browse Source 
1. add some efuse api to get rtc & digital voltage
2. set dig_rtc voltage to a fix value storing in efuse no mater which cpu frequency
3. modify hardware code in bootloader to fit all c3 ECO3 version
This commit is contained in:
chaijie
2021-04-28 10:32:08 +08:00
committed by sly
parent f975329429
commit eea76d14bb
8 changed files with 187 additions and 57 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
components/soc/esp32c3/include/soc/rtc.h
View File

@@ -122,6 +122,15 @@ set sleep_init default param
#define RTC_CNTL_PD_CUR_SLEEP_DEFAULT 1
#define RTC_CNTL_DG_VDD_DRV_B_SLP_DEFAULT 254
/*
The follow value is used to get a reasonable rtc voltage dbias value according to digital dbias & some other value
storing in efuse (based on ATE 5k ECO3 chips)
*/
#define K_RTC_MID_MUL10000 215
#define K_DIG_MID_MUL10000 213
#define V_RTC_MID_MUL10000 10800
#define V_DIG_MID_MUL10000 10860
/**
* @brief Possible main XTAL frequency values.
*