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fix(esp_rom): fix esp32c6, esp32h2 hp_regi2c ops data conflict with phy ops

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wuzhenghui
2023-08-18 15:16:02 +08:00
committed by fuzhibo@espressif.com
parent 1f3e3f8f6a
commit eeab989d09
3 changed files with 120 additions and 138 deletions
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22
components/soc/esp32c6/include/soc/i2c_ana_mst_reg.h
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@@ -104,44 +104,44 @@ extern "C" {
#define I2C_ANA_MST_BURST_DONE_S 0
#define I2C_ANA_MST_ANA_CONF0_REG (DR_REG_I2C_ANA_MST_BASE + 0x18)
/* I2C_MST_ANA_STATUS0 : RO ;bitpos:[31:24] ;default: 8'h0 ; */
/* I2C_ANA_MST_STATUS0 : RO ;bitpos:[31:24] ;default: 8'h0 ; */
/*description: .*/
#define I2C_ANA_MST_ANA_STATUS0 0x000000FF
#define I2C_ANA_MST_ANA_STATUS0_M ((I2C_MST_ANA_STATUS0_V)<<(I2C_MST_ANA_STATUS0_S))
#define I2C_ANA_MST_ANA_STATUS0_M ((I2C_ANA_MST_STATUS0_V)<<(I2C_ANA_MST_STATUS0_S))
#define I2C_ANA_MST_ANA_STATUS0_V 0xFF
#define I2C_ANA_MST_ANA_STATUS0_S 24
/* I2C_MST_ANA_CONF0 : R/W ;bitpos:[23:0] ;default: 24'h00_e408 ; */
/* I2C_ANA_MST_ANA_CONF0 : R/W ;bitpos:[23:0] ;default: 24'h00_e408 ; */
/*description: .*/
#define I2C_ANA_MST_ANA_CONF0 0x00FFFFFF
#define I2C_ANA_MST_ANA_CONF0_M ((I2C_MST_ANA_CONF0_V)<<(I2C_MST_ANA_CONF0_S))
#define I2C_ANA_MST_ANA_CONF0_M ((I2C_ANA_MST_ANA_CONF0_V)<<(I2C_ANA_MST_ANA_CONF0_S))
#define I2C_ANA_MST_ANA_CONF0_V 0xFFFFFF
#define I2C_ANA_MST_ANA_CONF0_S 0
#define I2C_ANA_MST_ANA_CONF1_REG (DR_REG_I2C_ANA_MST_BASE + 0x1C)
/* I2C_MST_ANA_STATUS1 : RO ;bitpos:[31:24] ;default: 8'h0 ; */
/* I2C_ANA_MST_STATUS1 : RO ;bitpos:[31:24] ;default: 8'h0 ; */
/*description: .*/
#define I2C_ANA_MST_ANA_STATUS1 0x000000FF
#define I2C_ANA_MST_ANA_STATUS1_M ((I2C_MST_ANA_STATUS1_V)<<(I2C_MST_ANA_STATUS1_S))
#define I2C_ANA_MST_ANA_STATUS1_M ((I2C_ANA_MST_STATUS1_V)<<(I2C_ANA_MST_STATUS1_S))
#define I2C_ANA_MST_ANA_STATUS1_V 0xFF
#define I2C_ANA_MST_ANA_STATUS1_S 24
/* I2C_MST_AANA_NA_CONF1 : R/W ;bitpos:[23:0] ;default: 24'h00_002d ; */
/*description: .*/
#define I2C_ANA_MST_ANA_CONF1 0x00FFFFFF
#define I2C_ANA_MST_ANA_CONF1_M ((I2C_MST_ANA_CONF1_V)<<(I2C_MST_ANA_CONF1_S))
#define I2C_ANA_MST_ANA_CONF1_M ((I2C_ANA_MST_ANA_CONF1_V)<<(I2C_ANA_MST_ANA_CONF1_S))
#define I2C_ANA_MST_ANA_CONF1_V 0xFFFFFF
#define I2C_ANA_MST_ANA_CONF1_S 0
#define I2C_ANA_MST_ANA_CONF2_REG (DR_REG_I2C_ANA_MST_BASE + 0x20)
/* I2C_MST_ANA_STATUS2 : RO ;bitpos:[31:24] ;default: 8'h0 ; */
/* I2C_ANA_MST_STATUS2 : RO ;bitpos:[31:24] ;default: 8'h0 ; */
/*description: .*/
#define I2C_ANA_MST_ANA_STATUS2 0x000000FF
#define I2C_ANA_MST_ANA_STATUS2_M ((I2C_MST_ANA_STATUS2_V)<<(I2C_MST_ANA_STATUS2_S))
#define I2C_ANA_MST_ANA_STATUS2_M ((I2C_ANA_MST_STATUS2_V)<<(I2C_ANA_MST_STATUS2_S))
#define I2C_ANA_MST_ANA_STATUS2_V 0xFF
#define I2C_ANA_MST_ANA_STATUS2_S 24
/* I2C_MST_ANA_CONF2 : R/W ;bitpos:[23:0] ;default: 24'h00_0004 ; */
/* I2C_ANA_MST_ANA_CONF2 : R/W ;bitpos:[23:0] ;default: 24'h00_0004 ; */
/*description: .*/
#define I2C_ANA_MST_ANA_CONF2 0x00FFFFFF
#define I2C_ANA_MST_ANA_CONF2_M ((I2C_MST_ANA_CONF2_V)<<(I2C_MST_ANA_CONF2_S))
#define I2C_ANA_MST_ANA_CONF2_M ((I2C_ANA_MST_ANA_CONF2_V)<<(I2C_ANA_MST_ANA_CONF2_S))
#define I2C_ANA_MST_ANA_CONF2_V 0xFFFFFF
#define I2C_ANA_MST_ANA_CONF2_S 0