mirror of
https://github.com/espressif/esp-idf.git
synced 2025-09-14 17:57:30 +00:00
driver: Add esp32c3 ADC driver
Based on internal commit 3ef01301fffa552d4be6d81bc9d199c223224305
This commit is contained in:
Angus Gratton
@@ -24,25 +24,47 @@
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extern "C" {
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#endif
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#if CONFIG_IDF_TARGET_ESP32
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/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
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typedef enum {
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ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO36 (ESP32), GPIO1 (ESP32-S2) */
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ADC1_CHANNEL_1, /*!< ADC1 channel 1 is GPIO37 (ESP32), GPIO2 (ESP32-S2) */
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ADC1_CHANNEL_2, /*!< ADC1 channel 2 is GPIO38 (ESP32), GPIO3 (ESP32-S2) */
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ADC1_CHANNEL_3, /*!< ADC1 channel 3 is GPIO39 (ESP32), GPIO4 (ESP32-S2) */
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ADC1_CHANNEL_4, /*!< ADC1 channel 4 is GPIO32 (ESP32), GPIO5 (ESP32-S2) */
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ADC1_CHANNEL_5, /*!< ADC1 channel 5 is GPIO33 (ESP32), GPIO6 (ESP32-S2) */
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ADC1_CHANNEL_6, /*!< ADC1 channel 6 is GPIO34 (ESP32), GPIO7 (ESP32-S2) */
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ADC1_CHANNEL_7, /*!< ADC1 channel 7 is GPIO35 (ESP32), GPIO8 (ESP32-S2) */
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#if CONFIG_IDF_TARGET_ESP32
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ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO36 */
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ADC1_CHANNEL_1, /*!< ADC1 channel 1 is GPIO37 */
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ADC1_CHANNEL_2, /*!< ADC1 channel 2 is GPIO38 */
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ADC1_CHANNEL_3, /*!< ADC1 channel 3 is GPIO39 */
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ADC1_CHANNEL_4, /*!< ADC1 channel 4 is GPIO32 */
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ADC1_CHANNEL_5, /*!< ADC1 channel 5 is GPIO33 */
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ADC1_CHANNEL_6, /*!< ADC1 channel 6 is GPIO34 */
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ADC1_CHANNEL_7, /*!< ADC1 channel 7 is GPIO35 */
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ADC1_CHANNEL_MAX,
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#elif CONFIG_IDF_TARGET_ESP32S2
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ADC1_CHANNEL_8, /*!< ADC1 channel 6 is GPIO9 (ESP32-S2)*/
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ADC1_CHANNEL_9, /*!< ADC1 channel 7 is GPIO10 (ESP32-S2) */
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ADC1_CHANNEL_MAX,
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#endif
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} adc1_channel_t;
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#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 // TODO ESP32-S3 channels are wrong IDF-1776
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/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
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typedef enum {
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ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO1 */
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ADC1_CHANNEL_1, /*!< ADC1 channel 1 is GPIO2 */
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ADC1_CHANNEL_2, /*!< ADC1 channel 2 is GPIO3 */
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ADC1_CHANNEL_3, /*!< ADC1 channel 3 is GPIO4 */
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ADC1_CHANNEL_4, /*!< ADC1 channel 4 is GPIO5 */
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ADC1_CHANNEL_5, /*!< ADC1 channel 5 is GPIO6 */
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ADC1_CHANNEL_6, /*!< ADC1 channel 6 is GPIO7 */
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ADC1_CHANNEL_7, /*!< ADC1 channel 7 is GPIO8 */
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ADC1_CHANNEL_8, /*!< ADC1 channel 6 is GPIO9 */
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ADC1_CHANNEL_9, /*!< ADC1 channel 7 is GPIO10 */
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ADC1_CHANNEL_MAX,
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} adc1_channel_t;
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#elif CONFIG_IDF_TARGET_ESP32C3
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/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
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typedef enum {
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ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO0 */
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ADC1_CHANNEL_1, /*!< ADC1 channel 1 is GPIO1 */
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ADC1_CHANNEL_2, /*!< ADC1 channel 2 is GPIO2 */
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ADC1_CHANNEL_3, /*!< ADC1 channel 3 is GPIO3 */
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ADC1_CHANNEL_4, /*!< ADC1 channel 4 is GPIO34 */
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ADC1_CHANNEL_MAX,
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} adc1_channel_t;
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#endif // CONFIG_IDF_TARGET_*
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#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 // TODO ESP32-S3 channels are wrong IDF-1776
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/**** `adc2_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
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typedef enum {
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ADC2_CHANNEL_0 = 0, /*!< ADC2 channel 0 is GPIO4 (ESP32), GPIO11 (ESP32-S2) */
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@@ -57,6 +79,14 @@ typedef enum {
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ADC2_CHANNEL_9, /*!< ADC2 channel 9 is GPIO26 (ESP32), GPIO20 (ESP32-S2) */
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ADC2_CHANNEL_MAX,
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} adc2_channel_t;
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#elif CONFIG_IDF_TARGET_ESP32C3
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/**** `adc2_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
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typedef enum {
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ADC2_CHANNEL_0 = 0, /*!< ADC2 channel 0 is GPIO5 */
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ADC2_CHANNEL_MAX,
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} adc2_channel_t;
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#endif
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/**
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* @brief ADC rtc controller attenuation option.
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@@ -73,6 +103,13 @@ typedef enum {
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#define ADC_WIDTH_11Bit ADC_WIDTH_BIT_11
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#define ADC_WIDTH_12Bit ADC_WIDTH_BIT_12
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#if CONFIG_IDF_TARGET_ESP32C3
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/**
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* @brief Digital ADC DMA read max timeout value, it may make the ``adc_digi_read_bytes`` block forever if the OS supports
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*/
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#define ADC_MAX_DELAY UINT32_MAX
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#endif
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/**
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* @brief ADC digital controller encode option.
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*
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@@ -84,6 +121,20 @@ typedef enum {
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ADC_ENCODE_MAX,
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} adc_i2s_encode_t;
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#if CONFIG_IDF_TARGET_ESP32C3
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//This feature is currently supported on ESP32C3, will be supported on other chips soon
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/**
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* @brief Digital ADC DMA configuration
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*/
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typedef struct adc_digi_init_config_s {
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uint32_t max_store_buf_size; ///< Max length of the converted data that driver can store before they are processed. When this length is reached, driver will dump out all the old data and start to store them again.
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uint32_t conv_num_each_intr; ///< Bytes of data that can be converted in 1 interrupt.
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uint32_t dma_chan; ///< DMA channel.
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uint16_t adc1_chan_mask; ///< Channel list of ADC1 to be initialized.
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uint16_t adc2_chan_mask; ///< Channel list of ADC2 to be initialized.
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} adc_digi_init_config_t;
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#endif
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/*---------------------------------------------------------------
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Common setting
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---------------------------------------------------------------*/
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@@ -392,7 +443,8 @@ esp_err_t adc2_vref_to_gpio(gpio_num_t gpio) __attribute__((deprecated));
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/*---------------------------------------------------------------
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Digital controller setting
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---------------------------------------------------------------*/
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#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
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//These APIs are only supported on ESP32 and ESP32-S2. On ESP32-C3 and later chips, please use ``adc_digi_initialize`` and ``adc_digi_deinitialize``
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/**
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* @brief ADC digital controller initialization.
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* @return
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@@ -406,17 +458,78 @@ esp_err_t adc_digi_init(void);
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* - ESP_OK Success
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*/
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esp_err_t adc_digi_deinit(void);
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#endif
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/**
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* @brief Setting the digital controller.
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*
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* @param config Pointer to digital controller paramter. Refer to `adc_digi_config_t`.
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* @param config Pointer to digital controller paramter. Refer to ``adc_digi_config_t``.
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*
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* @return
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* - ESP_OK Success
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*/
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esp_err_t adc_digi_controller_config(const adc_digi_config_t *config);
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#if CONFIG_IDF_TARGET_ESP32C3
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//This feature is currently supported on ESP32C3, will be supported on other chips soon
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/*---------------------------------------------------------------
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DMA setting
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---------------------------------------------------------------*/
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/**
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* @brief Initialize the Digital ADC.
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*
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* @param init_config Pointer to Digital ADC initilisation config. Refer to ``adc_digi_init_config_t``.
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*
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* @return
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* - ESP_ERR_INVALID_ARG If the combination of arguments is invalid.
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* - ESP_ERR_NOT_FOUND No free interrupt found with the specified flags
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* - ESP_ERR_NO_MEM If out of memory
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* - ESP_OK On success
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*/
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esp_err_t adc_digi_initialize(const adc_digi_init_config_t *init_config);
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/**
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* @brief Start the Digital ADC and DMA peripherals. After this, the hardware starts working.
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*
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* @return
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* - ESP_OK On success
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*/
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esp_err_t adc_digi_start(void);
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/**
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* @brief Stop the Digital ADC and DMA peripherals. After this, the hardware stops working.
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*
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* @return
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* - ESP_OK On success
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*/
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esp_err_t adc_digi_stop(void);
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/**
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* @brief Read bytes from Digital ADC through DMA.
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*
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* @param[out] buf Buffer to read from ADC.
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* @param[in] length_max Expected length of data read from the ADC.
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* @param[out] out_length Real length of data read from the ADC via this API.
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* @param[in] timeout_ms Time to wait for data via this API, in millisecond.
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*
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* @return
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* - ESP_ERR_INVALID_STATE Driver state is invalid. Usually it means the ADC sampling rate is faster than the task processing rate.
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* - ESP_ERR_TIMEOUT Operation timed out
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* - ESP_OK On success
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*/
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esp_err_t adc_digi_read_bytes(uint8_t *buf, uint32_t length_max, uint32_t *out_length, uint32_t timeout_ms);
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/**
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* @brief Deinitialize the Digital ADC.
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*
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* @return
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* - ESP_ERR_INVALID_STATE Driver state is invalid.
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* - ESP_OK On success
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*/
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esp_err_t adc_digi_deinitialize(void);
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#endif //#if CONFIG_IDF_TARGET_ESP32C3
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#ifdef __cplusplus
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}
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#endif
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