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timer_group: fix intr_enable

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timer group interrupt enable is controled by level_int_ena instead of int_ena

Closes https://github.com/espressif/esp-idf/issues/5103
This commit is contained in:
morris
2020-04-10 16:23:19 +08:00
parent 24c9f56d45
commit f09c9b957c
3 changed files with 36 additions and 17 deletions
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26
components/driver/timer.c
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@@ -258,7 +258,12 @@ esp_err_t timer_group_intr_enable(timer_group_t group_num, uint32_t en_mask)
{
TIMER_CHECK(group_num < TIMER_GROUP_MAX, TIMER_GROUP_NUM_ERROR, ESP_ERR_INVALID_ARG);
portENTER_CRITICAL(&timer_spinlock[group_num]);
TG[group_num]->int_ena.val |= en_mask;
for (int i = 0; i < 2; i++) {
if (en_mask & (1 << i)) {
TG[group_num]->hw_timer[i].config.level_int_en = 1;
TG[group_num]->int_ena.val |= (1 << i);
}
}
portEXIT_CRITICAL(&timer_spinlock[group_num]);
return ESP_OK;
}
@@ -267,7 +272,12 @@ esp_err_t timer_group_intr_disable(timer_group_t group_num, uint32_t disable_mas
{
TIMER_CHECK(group_num < TIMER_GROUP_MAX, TIMER_GROUP_NUM_ERROR, ESP_ERR_INVALID_ARG);
portENTER_CRITICAL(&timer_spinlock[group_num]);
TG[group_num]->int_ena.val &= (~disable_mask);
for (int i = 0; i < 2; i++) {
if (disable_mask & (1 << i)) {
TG[group_num]->hw_timer[i].config.level_int_en = 0;
TG[group_num]->int_ena.val &= ~(1 << i);
}
}
portEXIT_CRITICAL(&timer_spinlock[group_num]);
return ESP_OK;
}
@@ -276,14 +286,22 @@ esp_err_t timer_enable_intr(timer_group_t group_num, timer_idx_t timer_num)
{
TIMER_CHECK(group_num < TIMER_GROUP_MAX, TIMER_GROUP_NUM_ERROR, ESP_ERR_INVALID_ARG);
TIMER_CHECK(timer_num < TIMER_MAX, TIMER_NUM_ERROR, ESP_ERR_INVALID_ARG);
return timer_group_intr_enable(group_num, BIT(timer_num));
portENTER_CRITICAL(&timer_spinlock[group_num]);
TG[group_num]->hw_timer[timer_num].config.level_int_en = 1;
TG[group_num]->int_ena.val |= (1 << timer_num);
portEXIT_CRITICAL(&timer_spinlock[group_num]);
return ESP_OK;
}
esp_err_t timer_disable_intr(timer_group_t group_num, timer_idx_t timer_num)
{
TIMER_CHECK(group_num < TIMER_GROUP_MAX, TIMER_GROUP_NUM_ERROR, ESP_ERR_INVALID_ARG);
TIMER_CHECK(timer_num < TIMER_MAX, TIMER_NUM_ERROR, ESP_ERR_INVALID_ARG);
return timer_group_intr_disable(group_num, BIT(timer_num));
portENTER_CRITICAL(&timer_spinlock[group_num]);
TG[group_num]->hw_timer[timer_num].config.level_int_en = 0;
TG[group_num]->int_ena.val &= ~(1 << timer_num);
portEXIT_CRITICAL(&timer_spinlock[group_num]);
return ESP_OK;
}