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refactor(usb/phy): Merge P4 and S2/S3 PHYs into one module

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P4 had separate PHY implementation for initial bring-up,
now we can merge it with the original PHY driver.
This commit is contained in:
Tomas Rezucha
2025-01-08 13:00:02 +01:00
parent 9fb37219a2
commit f1fa7b1408
14 changed files with 208 additions and 127 deletions
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6
components/usb/test_apps/hcd/main/test_hcd_common.c
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -153,7 +153,11 @@ hcd_port_handle_t test_hcd_setup(void)
// Initialize the internal USB PHY to connect to the USB OTG peripheral
usb_phy_config_t phy_config = {
.controller = USB_PHY_CTRL_OTG,
#if CONFIG_IDF_TARGET_ESP32P4 // ESP32-P4 has 2 USB-DWC peripherals, each with its dedicated PHY. We support HS+UTMI only ATM.
.target = USB_PHY_TARGET_UTMI,
#else
.target = USB_PHY_TARGET_INT,
#endif
.otg_mode = USB_OTG_MODE_HOST,
.otg_speed = USB_PHY_SPEED_UNDEFINED, // In Host mode, the speed is determined by the connected device
.ext_io_conf = NULL,