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feat(gpio): update gpio docs on ESP32C5 MP version
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@@ -73,7 +73,9 @@ In addition, if you would like to dump the configurations of all IOs, you can us
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If an IO pin is routed to a peripheral signal through the GPIO matrix, the signal ID printed in the dump information is defined in the :component_file:`soc/{IDF_TARGET_PATH_NAME}/include/soc/gpio_sig_map.h` header file. The word ``**RESERVED**`` indicates the IO is occupied by either SPI flash or PSRAM. It is strongly not recommended to reconfigure them for other application purposes.
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.. only:: esp32c3 or esp32c6 or esp32h2 or esp32p4 or esp32s2 or esp32s3
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Do not rely on the default configurations values in the Technical Reference Manual, because it may be changed in the bootloader or application startup code before app_main.
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.. only:: esp32c3 or esp32c6 or esp32h2 or esp32p4 or esp32s2 or esp32s3 or esp32c5
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Configure USB PHY Pins to GPIO
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-------------------------------
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@@ -9,9 +9,7 @@
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.. gpio-summary
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Current GPIOs are for {IDF_TARGET_NAME} beta3 version. {IDF_TARGET_NAME} MP version would have 2 more available IOs, and some pin functions are changed. The {IDF_TARGET_NAME} MP version will be updated later.
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The {IDF_TARGET_NAME} chip features 27 physical GPIO pins (GPIO0 ~ GPIO26). Each pin can be used as a general-purpose I/O, or to be connected to an internal peripheral signal. Through GPIO matrix and IO MUX, peripheral input signals can be from any IO pins, and peripheral output signals can be routed to any IO pins. Together these modules provide highly configurable I/O. For more details, see *{IDF_TARGET_NAME} Technical Reference Manual* > *IO MUX and GPIO Matrix (GPIO, IO_MUX)* [`PDF <{IDF_TARGET_TRM_EN_URL}#iomuxgpio>`__].
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The {IDF_TARGET_NAME} chip features 29 physical GPIO pins (GPIO0 ~ GPIO28). Each pin can be used as a general-purpose I/O, or to be connected to an internal peripheral signal. Through GPIO matrix and IO MUX, peripheral input signals can be from any IO pins, and peripheral output signals can be routed to any IO pins. Together these modules provide highly configurable I/O. For more details, see *{IDF_TARGET_NAME} Technical Reference Manual* > *IO MUX and GPIO Matrix (GPIO, IO_MUX)* [`PDF <{IDF_TARGET_TRM_EN_URL}#iomuxgpio>`__].
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The table below provides more information on pin usage, and please note the comments in the table for GPIOs with restrictions.
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@@ -42,7 +40,7 @@ The table below provides more information on pin usage, and please note the comm
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* - GPIO3
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- ADC1_CH2
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- LP_GPIO3
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- Strapping pin
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-
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* - GPIO4
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- ADC1_CH3
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@@ -57,7 +55,7 @@ The table below provides more information on pin usage, and please note the comm
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* - GPIO6
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- ADC1_CH5
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- LP_GPIO6
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- Strapping pin
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-
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* - GPIO7
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-
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@@ -92,12 +90,12 @@ The table below provides more information on pin usage, and please note the comm
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* - GPIO13
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-
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-
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-
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- USB-JTAG
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* - GPIO14
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-
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-
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-
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- USB-JTAG
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* - GPIO15
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-
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@@ -107,12 +105,12 @@ The table below provides more information on pin usage, and please note the comm
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* - GPIO16
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-
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-
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-
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- SPI0/1
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* - GPIO17
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-
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-
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-
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- SPI0/1
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* - GPIO18
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-
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@@ -142,27 +140,37 @@ The table below provides more information on pin usage, and please note the comm
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* - GPIO23
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-
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-
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- SPI0/1
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-
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* - GPIO24
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-
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-
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- SPI0/1
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-
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* - GPIO25
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-
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-
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- USB-JTAG
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-
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* - GPIO26
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-
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-
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- USB-JTAG
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-
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* - GPIO27
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-
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-
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- Strapping pin
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* - GPIO28
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-
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-
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- Strapping pin
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.. note::
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- Strapping pin: GPIO2, GPIO3, GPIO6, and GPIO7 are strapping pins. For more information, please refer to `datasheet <{IDF_TARGET_DATASHEET_EN_URL}>`__.
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- SPI0/1: GPIO18 ~ GPIO24 are usually used for SPI flash and not recommended for other uses.
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- USB-JTAG: GPIO25 and GPIO26 are used by USB-JTAG by default. If they are reconfigured to operate as normal GPIOs, USB-JTAG functionality will be disabled.
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- Strapping pin: GPIO2, GPIO7, GPIO27, and GPIO28 are strapping pins. For more information, please refer to `datasheet <{IDF_TARGET_DATASHEET_EN_URL}>`__.
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- SPI0/1: GPIO16 ~ GPIO22 are usually used for SPI flash and not recommended for other uses.
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- USB-JTAG: GPIO13 and GPIO14 are used by USB-JTAG by default. If they are reconfigured to operate as normal GPIOs, USB-JTAG functionality will be disabled.
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---
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