freertos: riscv port now uses interrupt allocator and crosscore interrupt

This commit is contained in:
Felipe Neves
2020-11-13 16:03:50 -03:00
committed by morris
parent 09bc1580be
commit f4781d3b1d
4 changed files with 46 additions and 77 deletions

View File

@@ -16,9 +16,6 @@
#include "soc/soc_caps.h"
#include "soc/soc.h"
// TODO ESP32-C3 IDF-2126 check this table is correct, some interrupts may be unnecessarily reserved or not reserved
// or marked as the wrong type
//This is basically a software-readable version of the interrupt usage table in include/soc/soc.h
const int_desc_t interrupt_descriptor_table[32] = {
{ 1, INTTP_LEVEL, {INTDESC_RESVD } }, //0