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bootloader: Add QIO support for ESP32-D2WD SPI flash
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committed by
Angus Gratton

parent
85e76a7cfc
commit
f7793840e1
@@ -512,6 +512,24 @@ esp_rom_spiflash_result_t esp_rom_spiflash_write_encrypted(uint32_t flash_addr,
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esp_rom_spiflash_result_t esp_rom_spiflash_wait_idle(esp_rom_spiflash_chip_t *spi);
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/** @brief Enable Quad I/O pin functions
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*
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* @note Please do not call this function in SDK.
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*
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* Sets the HD & WP pin functions for Quad I/O modes, based on the
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* efuse SPI pin configuration.
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*
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* @param wp_gpio_num - Number of the WP pin to reconfigure for quad I/O.
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*
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* @param spiconfig - Pin configuration, as returned from ets_efuse_get_spiconfig().
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* - If this parameter is 0, default SPI pins are used and wp_gpio_num parameter is ignored.
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* - If this parameter is 1, default HSPI pins are used and wp_gpio_num parameter is ignored.
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* - For other values, this parameter encodes the HD pin number and also the CLK pin number. CLK pin selection is used
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* to determine if HSPI or SPI peripheral will be used (use HSPI if CLK pin is the HSPI clock pin, otherwise use SPI).
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* Both HD & WP pins are configured via GPIO matrix to map to the selected peripheral.
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*/
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void esp_rom_spiflash_select_qio_pins(uint8_t wp_gpio_num, uint32_t spiconfig);
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/** @brief Global esp_rom_spiflash_chip_t structure used by ROM functions
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*
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*/
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