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component/esp32 : fix dualcore bug

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1. When dual core cpu run access DPORT register, must do protection.
2. If access DPORT register, must use DPORT_REG_READ/DPORT_REG_WRITE and DPORT_XXX register operation macro.
This commit is contained in:
Tian Hao
2017-05-08 20:03:04 +08:00
parent 5c0d0d4854
commit f7e8856520
28 changed files with 592 additions and 207 deletions
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5
components/esp32/phy_init.c
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@@ -26,6 +26,7 @@
#include "esp_err.h"
#include "esp_phy_init.h"
#include "esp_dport_access.h"
#include "esp_system.h"
#include "esp_log.h"
#include "nvs.h"
@@ -52,7 +53,7 @@ esp_err_t esp_phy_rf_init(const esp_phy_init_data_t* init_data,
_lock_acquire(&s_phy_rf_init_lock);
if (s_phy_rf_init_count == 0) {
// Enable WiFi peripheral clock
SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_EN | DPORT_WIFI_CLK_RNG_EN);
DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_EN | DPORT_WIFI_CLK_RNG_EN);
ESP_LOGV(TAG, "register_chipv7_phy, init_data=%p, cal_data=%p, mode=%d",
init_data, calibration_data, mode);
phy_set_wifi_mode_only(0);
@@ -77,7 +78,7 @@ esp_err_t esp_phy_rf_deinit(void)
// Disable PHY and RF.
phy_close_rf();
// Disable WiFi peripheral clock. Do not disable clock for hardware RNG
CLEAR_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_EN);
DPORT_CLEAR_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_EN);
} else {
#if CONFIG_SW_COEXIST_ENABLE
coex_deinit();