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component/esp32 : fix dualcore bug
1. When dual core cpu run access DPORT register, must do protection. 2. If access DPORT register, must use DPORT_REG_READ/DPORT_REG_WRITE and DPORT_XXX register operation macro.
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@@ -19,6 +19,7 @@
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#include "esp_wifi.h"
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#include "esp_wifi_internal.h"
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#include "esp_log.h"
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#include "esp_dport_access.h"
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#include "sdkconfig.h"
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#include "rom/efuse.h"
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#include "rom/cache.h"
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@@ -270,17 +271,17 @@ void IRAM_ATTR esp_restart_noos()
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uart_tx_wait_idle(2);
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// Reset wifi/bluetooth/ethernet/sdio (bb/mac)
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SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG,
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DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG,
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DPORT_BB_RST | DPORT_FE_RST | DPORT_MAC_RST |
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DPORT_BT_RST | DPORT_BTMAC_RST | DPORT_SDIO_RST |
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DPORT_SDIO_HOST_RST | DPORT_EMAC_RST | DPORT_MACPWR_RST |
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DPORT_RW_BTMAC_RST | DPORT_RW_BTLP_RST);
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REG_WRITE(DPORT_CORE_RST_EN_REG, 0);
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DPORT_REG_WRITE(DPORT_CORE_RST_EN_REG, 0);
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// Reset timer/spi/uart
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SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG,
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DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG,
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DPORT_TIMERS_RST | DPORT_SPI_RST_1 | DPORT_UART_RST);
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REG_WRITE(DPORT_PERIP_RST_EN_REG, 0);
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DPORT_REG_WRITE(DPORT_PERIP_RST_EN_REG, 0);
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// Set CPU back to XTAL source, no PLL, same as hard reset
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rtc_clk_cpu_freq_set(RTC_CPU_FREQ_XTAL);
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