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https://github.com/espressif/esp-idf.git
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driver/i2s: support i2s on c3 and s3
1. Support i2s on esp32c3 and esp32s3
2. Refactor i2s_config_t to avoid breaking change
2. Fix a bug that receiving unavailable values from message queue when dma queue has been re-allocted
4. Support i2s unit test on esp32c3 and esp32s3
This commit is contained in:
laokaiyao
@@ -28,42 +28,70 @@ extern "C" {
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#define I2S_PIN_NO_CHANGE (-1) /*!< Use in i2s_pin_config_t for pins which should not be changed */
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/**
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* @brief I2S port number, the max port number is (I2S_NUM_MAX -1).
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*/
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typedef enum {
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I2S_NUM_0 = 0, /*!< I2S port 0 */
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#if SOC_I2S_NUM > 1
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I2S_NUM_1 = 1, /*!< I2S port 1 */
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#endif
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I2S_NUM_MAX, /*!< I2S port max */
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} i2s_port_t;
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/**
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* @brief I2S pin number for i2s_set_pin
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*
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*/
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typedef struct {
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int bck_io_num; /*!< BCK in out pin*/
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int ws_io_num; /*!< WS in out pin*/
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int data_out_num; /*!< DATA out pin*/
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int data_in_num; /*!< DATA in pin*/
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} i2s_pin_config_t;
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#if SOC_I2S_SUPPORTS_TDM
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typedef i2s_hal_chan_cfg_t tdm_chan_cfg_t;
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typedef i2s_hal_tdm_flags_t tdm_flags_t;
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#endif
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/**
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* @brief I2S driver configuration parameters
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*
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*/
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typedef struct {
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union {
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// Compatible with previous versions. For ESP32-S3, ESP32-C3 and the later chip, you should use `param_cfg` fields to initialize I2S.
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struct {
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i2s_mode_t mode; /*!< I2S work mode*/
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uint32_t sample_rate; /*!< I2S sample rate*/
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uint32_t bits_per_sample; /*!< I2S bits per sample*/
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i2s_channel_fmt_t channel_format; /*!< I2S channel format */
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i2s_comm_format_t communication_format; /*!< I2S communication format */
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};
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i2s_config_param_t param_cfg; /*!< I2S config paramater */
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};
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int intr_alloc_flags; /*!< Flags used to allocate the interrupt. One or multiple (ORred) ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info */
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int dma_buf_count; /*!< I2S DMA Buffer Count */
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int dma_buf_len; /*!< I2S DMA Buffer Length */
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bool use_apll; /*!< I2S using APLL as main I2S clock, enable it to get accurate clock */
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bool tx_desc_auto_clear; /*!< I2S auto clear tx descriptor if there is underflow condition (helps in avoiding noise in case of data unavailability) */
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int fixed_mclk; /*!< I2S using fixed MCLK output. If use_apll = true and fixed_mclk > 0, then the clock output for i2s is fixed and equal to the fixed_mclk value.*/
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i2s_mode_t mode; /*!< I2S work mode */
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uint32_t sample_rate; /*!< I2S sample rate */
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i2s_bits_per_sample_t bits_per_sample; /*!< I2S sample bits in one channel */
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i2s_channel_fmt_t channel_format; /*!< I2S channel format.*/
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i2s_comm_format_t communication_format; /*!< I2S communication format */
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int intr_alloc_flags; /*!< Flags used to allocate the interrupt. One or multiple (ORred) ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info */
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int dma_buf_count; /*!< I2S DMA Buffer Count */
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int dma_buf_len; /*!< I2S DMA Buffer Length */
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bool use_apll; /*!< I2S using APLL as main I2S clock, enable it to get accurate clock */
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bool tx_desc_auto_clear; /*!< I2S auto clear tx descriptor if there is underflow condition (helps in avoiding noise in case of data unavailability) */
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int fixed_mclk; /*!< I2S using fixed MCLK output. If use_apll = true and fixed_mclk > 0, then the clock output for i2s is fixed and equal to the fixed_mclk value.*/
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i2s_bits_per_slot_t bits_per_slot; /*!< I2S total bits in one channel， Should not be smaller than 'bits_per_sample', default '0' means equal to 'bits_per_sample' */
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#if SOC_I2S_SUPPORTS_TDM
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tdm_chan_cfg_t tdm_chan_cfg; /*!< I2S TDM channel configurations*/
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tdm_flags_t tdm_flags; /*!< I2S TDM flags*/
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#endif
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} i2s_driver_config_t;
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typedef i2s_driver_config_t i2s_config_t;
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typedef intr_handle_t i2s_isr_handle_t;
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/**
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* @brief I2S event types
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* @brief I2S event queue types
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*
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*/
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typedef enum {
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I2S_EVENT_DMA_ERROR,
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I2S_EVENT_TX_DONE, /*!< I2S DMA finish sent 1 buffer*/
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I2S_EVENT_RX_DONE, /*!< I2S DMA finish received 1 buffer*/
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I2S_EVENT_TX_Q_OVF, /*!< I2S DMA sent queue overflow*/
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I2S_EVENT_RX_Q_OVF, /*!< I2S DMA receive queue overflow*/
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I2S_EVENT_MAX, /*!< I2S event max index*/
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} i2s_event_type_t;
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/**
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@@ -123,7 +151,7 @@ esp_err_t i2s_set_pdm_rx_down_sample(i2s_port_t i2s_num, i2s_pdm_dsr_t dsr);
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#if SOC_I2S_SUPPORTS_PDM_TX
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/**
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* @brief Set TX PDM mode up-sample rate
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* TX PDM have two type upsampling rate configurations:
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* TX PDM can only be set to the following two upsampling rate configurations:
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* 1: fp = 960, fs = sample_rate / 100, in this case, Fpdm = 128*48000
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* 2: fp = 960, fs = 480, in this case, Fpdm = 128*Fpcm = 128*sample_rate
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* If the pdm receiver do not care the pdm serial clock, it's recommended set Fpdm = 128*48000
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@@ -162,7 +190,7 @@ esp_err_t i2s_set_pdm_tx_up_sample(i2s_port_t i2s_num, int sample_rate, int fp,
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* - ESP_ERR_INVALID_ARG Parameter error
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* - ESP_ERR_NO_MEM Out of memory
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*/
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esp_err_t i2s_driver_install(i2s_port_t i2s_num, const i2s_config_t *i2s_config, int queue_size, void* i2s_queue);
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esp_err_t i2s_driver_install(i2s_port_t i2s_num, const i2s_config_t *i2s_config, int queue_size, void *i2s_queue);
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/**
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* @brief Uninstall I2S driver.
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@@ -326,7 +354,7 @@ esp_err_t i2s_zero_dma_buffer(i2s_port_t i2s_num);
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2s_pcm_config(i2s_port_t i2s_num, int mode, i2s_pcm_cfg_t pcm_cfg);
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esp_err_t i2s_pcm_config(i2s_port_t i2s_num, i2s_mode_t mode, i2s_pcm_mode_t pcm_cfg);
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#endif
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/**
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@@ -334,20 +362,27 @@ esp_err_t i2s_pcm_config(i2s_port_t i2s_num, int mode, i2s_pcm_cfg_t pcm_cfg);
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*
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* Similar to i2s_set_sample_rates(), but also sets bit width.
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*
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* 1. stop i2s;
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* 2. calculate mclk, bck, bck_factor
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* 3. malloc dma buffer;
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* 4. start i2s
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*
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* @param i2s_num I2S_NUM_0, I2S_NUM_1
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*
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* @param rate I2S sample rate (ex: 8000, 44100...)
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*
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* @param slot_bits i2s slot bit configuration
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* @param bits_cfg I2S bits configuation
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* the low 16 bits is for data bits per sample in one channel (see 'i2s_bits_per_sample_t')
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* the high 16 bits is for total bits in one channel (see 'i2s_bits_per_slot_t')
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*
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* @param sloct_ch I2S slot number configuration
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* @param ch I2S channel, (I2S_CHANNEL_MONO, I2S_CHANNEL_STEREO)
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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* - ESP_ERR_NO_MEM Out of memory
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*/
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esp_err_t i2s_set_clk(i2s_port_t i2s_num, uint32_t rate, i2s_slot_bits_cfg_t slot_bits, i2s_slot_channel_cfg_t sloct_ch);
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esp_err_t i2s_set_clk(i2s_port_t i2s_num, uint32_t rate, uint32_t bits_cfg, i2s_channel_t ch);
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/**
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* @brief get clock set on particular port number.
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@@ -357,7 +392,7 @@ esp_err_t i2s_set_clk(i2s_port_t i2s_num, uint32_t rate, i2s_slot_bits_cfg_t slo
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* @return
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* - actual clock set by i2s driver
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*/
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uint32_t i2s_get_clk(i2s_port_t i2s_num);
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float i2s_get_clk(i2s_port_t i2s_num);
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#if SOC_I2S_SUPPORTS_ADC_DAC
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/**
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