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https://github.com/espressif/esp-idf.git
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driver/i2s: support i2s on c3 and s3
1. Support i2s on esp32c3 and esp32s3
2. Refactor i2s_config_t to avoid breaking change
2. Fix a bug that receiving unavailable values from message queue when dma queue has been re-allocted
4. Support i2s unit test on esp32c3 and esp32s3
This commit is contained in:
laokaiyao
@@ -21,22 +21,51 @@
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#include "math.h"
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#include "esp_rom_gpio.h"
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C3)
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#define SAMPLE_RATE (36000)
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#define SAMPLE_BITS (16)
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#if CONFIG_IDF_TARGET_ESP32
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#define MASTER_BCK_IO 15
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#define MASTER_WS_IO 25
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#define SLAVE_BCK_IO 19
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#define SLAVE_WS_IO 26
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#define DATA_IN_IO 21
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#if CONFIG_IDF_TARGET_ESP32
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#define MASTER_WS_IO 25
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#define DATA_OUT_IO 22
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#define ADC1_CHANNEL_4_IO 32
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#define I2S0_DATA_OUT_IDX I2S0O_DATA_OUT23_IDX
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#define I2S0_DATA_IN_IDX I2S0I_DATA_IN15_IDX
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#define I2S1_DATA_OUT_IDX I2S1O_DATA_OUT23_IDX
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#define I2S1_DATA_IN_IDX I2S1I_DATA_IN15_IDX
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#elif CONFIG_IDF_TARGET_ESP32S2
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#define MASTER_BCK_IO 15
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#define MASTER_WS_IO 28
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#define SLAVE_BCK_IO 19
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#define SLAVE_WS_IO 26
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#define DATA_IN_IO 21
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#define DATA_OUT_IO 20
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#define I2S0_DATA_OUT_IDX I2S0O_DATA_OUT23_IDX
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#define I2S0_DATA_IN_IDX I2S0I_DATA_IN15_IDX
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#elif CONFIG_IDF_TARGET_ESP32C3
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// TODO: change pins
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#define MASTER_BCK_IO 4
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#define MASTER_WS_IO 5
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#define SLAVE_BCK_IO 14
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#define SLAVE_WS_IO 15
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#define DATA_IN_IO 19
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#define DATA_OUT_IO 18
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#define I2S0_DATA_OUT_IDX I2SO_SD_OUT_IDX
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#define I2S0_DATA_IN_IDX I2SI_SD_IN_IDX
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#elif CONFIG_IDF_TARGET_ESP32S3
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#define MASTER_BCK_IO 4
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#define MASTER_WS_IO 5
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#define SLAVE_BCK_IO 14
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#define SLAVE_WS_IO 15
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#define DATA_IN_IO 19
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#define DATA_OUT_IO 18
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#define I2S0_DATA_OUT_IDX I2S0O_SD_OUT_IDX
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#define I2S0_DATA_IN_IDX I2S0I_SD_IN_IDX
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#define I2S1_DATA_OUT_IDX I2S1O_SD_OUT_IDX
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#define I2S1_DATA_IN_IDX I2S1I_SD_IN_IDX
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#endif
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#define PERCENT_DIFF 0.0001
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@@ -67,8 +96,8 @@ static void i2s_test_io_config(int mode)
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esp_rom_gpio_connect_out_signal(MASTER_WS_IO, I2S0I_WS_OUT_IDX, 0, 0);
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esp_rom_gpio_connect_in_signal(MASTER_WS_IO, I2S1O_WS_IN_IDX, 0);
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esp_rom_gpio_connect_out_signal(DATA_OUT_IO, I2S1O_DATA_OUT23_IDX, 0, 0);
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esp_rom_gpio_connect_in_signal(DATA_OUT_IO, I2S0I_DATA_IN15_IDX, 0);
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esp_rom_gpio_connect_out_signal(DATA_OUT_IO, I2S1_DATA_OUT_IDX, 0, 0);
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esp_rom_gpio_connect_in_signal(DATA_OUT_IO, I2S0_DATA_IN_IDX, 0);
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}
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break;
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@@ -79,14 +108,14 @@ static void i2s_test_io_config(int mode)
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esp_rom_gpio_connect_out_signal(MASTER_WS_IO, I2S0O_WS_OUT_IDX, 0, 0);
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esp_rom_gpio_connect_in_signal(MASTER_WS_IO, I2S1I_WS_IN_IDX, 0);
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esp_rom_gpio_connect_out_signal(DATA_OUT_IO, I2S0O_DATA_OUT23_IDX, 0, 0);
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esp_rom_gpio_connect_in_signal(DATA_OUT_IO, I2S1I_DATA_IN15_IDX, 0);
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esp_rom_gpio_connect_out_signal(DATA_OUT_IO, I2S0_DATA_OUT_IDX, 0, 0);
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esp_rom_gpio_connect_in_signal(DATA_OUT_IO, I2S1_DATA_IN_IDX, 0);
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}
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break;
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#endif
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case I2S_TEST_MODE_LOOPBACK: {
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esp_rom_gpio_connect_out_signal(DATA_OUT_IO, I2S0O_DATA_OUT23_IDX, 0, 0);
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esp_rom_gpio_connect_in_signal(DATA_OUT_IO, I2S0I_DATA_IN15_IDX, 0);
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esp_rom_gpio_connect_out_signal(DATA_OUT_IO, I2S0_DATA_OUT_IDX, 0, 0);
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esp_rom_gpio_connect_in_signal(DATA_OUT_IO, I2S0_DATA_IN_IDX, 0);
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}
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break;
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@@ -107,35 +136,17 @@ TEST_CASE("I2S basic driver install, uninstall, set pin test", "[i2s]")
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{
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// dac, adc i2s
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i2s_config_t i2s_config = {
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.param_cfg = {
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.mode = I2S_MODE_MASTER | I2S_MODE_TX,
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.sample_rate = SAMPLE_RATE,
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.slot_bits_cfg = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
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.communication_format = I2S_COMM_FORMAT_STAND_I2S,
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#if SOC_I2S_SUPPORTS_TDM
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.slot_channel_cfg = (2 << SLOT_CH_SHIFT) | 2,
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.active_slot_mask = I2S_TDM_ACTIVE_CH0 | I2S_TDM_ACTIVE_CH1,
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.left_align_en = false,
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.big_edin_en = false,
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.bit_order_msb_en = false,
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#endif
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},
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.mode = I2S_MODE_MASTER | I2S_MODE_TX,
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.sample_rate = SAMPLE_RATE,
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.bits_per_sample = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
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.communication_format = I2S_COMM_FORMAT_STAND_I2S,
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.dma_buf_count = 6,
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.dma_buf_len = 60,
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.use_apll = 0,
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.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
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};
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#if CONFIG_IDF_TARGET_ESP32
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//install and start i2s driver
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TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
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//for internal DAC, this will enable both of the internal channels
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TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, NULL));
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//stop & destroy i2s driver
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TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
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#endif
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// normal i2s
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i2s_pin_config_t pin_config = {
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.bck_io_num = MASTER_BCK_IO,
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@@ -161,20 +172,11 @@ TEST_CASE("I2S Loopback test(master tx and rx)", "[i2s]")
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{
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// master driver installed and send data
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i2s_config_t master_i2s_config = {
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.param_cfg = {
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.mode = I2S_MODE_MASTER | I2S_MODE_TX | I2S_MODE_RX,
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.sample_rate = SAMPLE_RATE,
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.slot_bits_cfg = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
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.communication_format = I2S_COMM_FORMAT_STAND_I2S,
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#if SOC_I2S_SUPPORTS_TDM
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.slot_channel_cfg = (2 << SLOT_CH_SHIFT) | 2,
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.active_slot_mask = I2S_TDM_ACTIVE_CH0 | I2S_TDM_ACTIVE_CH1,
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.left_align_en = false,
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.big_edin_en = false,
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.bit_order_msb_en = false,
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#endif
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},
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.mode = I2S_MODE_MASTER | I2S_MODE_TX | I2S_MODE_RX,
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.sample_rate = SAMPLE_RATE,
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.bits_per_sample = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
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.communication_format = I2S_COMM_FORMAT_STAND_I2S,
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.dma_buf_count = 6,
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.dma_buf_len = 100,
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.use_apll = 0,
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@@ -230,89 +232,17 @@ TEST_CASE("I2S Loopback test(master tx and rx)", "[i2s]")
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i2s_driver_uninstall(I2S_NUM_0);
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}
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#if !DISABLED_FOR_TARGETS(ESP32S2)
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/* ESP32S2 has only single I2S port and hence following test cases are not applicable */
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TEST_CASE("I2S adc test", "[i2s]")
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{
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// init I2S ADC
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i2s_config_t i2s_config = {
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.param_cfg = {
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.mode = I2S_MODE_MASTER | I2S_MODE_RX | I2S_MODE_ADC_BUILT_IN,
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.sample_rate = SAMPLE_RATE,
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.slot_bits_cfg = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
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#if SOC_I2S_SUPPORTS_TDM
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.slot_channel_cfg = (2 << SLOT_CH_SHIFT) | 2,
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.active_slot_mask = I2S_TDM_ACTIVE_CH0 | I2S_TDM_ACTIVE_CH1,
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.left_align_en = false,
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.big_edin_en = false,
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.bit_order_msb_en = false,
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#endif
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},
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.intr_alloc_flags = 0,
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.dma_buf_count = 2,
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.dma_buf_len = 1024,
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.use_apll = 0,
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};
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// install and start I2S driver
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i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL);
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// init ADC pad
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i2s_set_adc_mode(ADC_UNIT_1, ADC1_CHANNEL_4);
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// enable adc sampling, ADC_WIDTH_BIT_12, ADC_ATTEN_DB_11 hard-coded in adc_i2s_mode_init
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i2s_adc_enable(I2S_NUM_0);
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// init read buffer
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uint16_t* i2sReadBuffer = (uint16_t*)calloc(1024, sizeof(uint16_t));
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size_t bytesRead;
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for (int loop = 0; loop < 10; loop++) {
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for (int level = 0; level <= 1; level++) {
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if (level == 0) {
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gpio_set_pull_mode(ADC1_CHANNEL_4_IO, GPIO_PULLDOWN_ONLY);
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} else {
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gpio_set_pull_mode(ADC1_CHANNEL_4_IO, GPIO_PULLUP_ONLY);
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}
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vTaskDelay(200 / portTICK_RATE_MS);
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// read data from adc, will block until buffer is full
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i2s_read(I2S_NUM_0, (void*)i2sReadBuffer, 1024 * sizeof(uint16_t), &bytesRead, portMAX_DELAY);
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// calc average
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int64_t adcSumValue = 0;
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for (size_t i = 0; i < 1024; i++) {
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adcSumValue += i2sReadBuffer[i] & 0xfff;
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}
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int adcAvgValue = adcSumValue / 1024;
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printf("adc average val: %d\n", adcAvgValue);
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if (level == 0) {
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TEST_ASSERT_LESS_THAN(100, adcAvgValue);
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} else {
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TEST_ASSERT_GREATER_THAN(4000, adcAvgValue);
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}
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}
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}
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i2s_adc_disable(I2S_NUM_0);
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free(i2sReadBuffer);
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i2s_driver_uninstall(I2S_NUM_0);
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}
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#if !DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)
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/* ESP32S2 and ESP32C3 has only single I2S port and hence following test cases are not applicable */
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TEST_CASE("I2S write and read test(master tx and slave rx)", "[i2s]")
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{
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// master driver installed and send data
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i2s_config_t master_i2s_config = {
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.param_cfg = {
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.mode = I2S_MODE_MASTER | I2S_MODE_TX,
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.sample_rate = SAMPLE_RATE,
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.slot_bits_cfg = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
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.communication_format = I2S_COMM_FORMAT_STAND_I2S,
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#if SOC_I2S_SUPPORTS_TDM
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.slot_channel_cfg = (2 << SLOT_CH_SHIFT) | 2,
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.active_slot_mask = I2S_TDM_ACTIVE_CH0 | I2S_TDM_ACTIVE_CH1,
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.left_align_en = false,
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.big_edin_en = false,
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.bit_order_msb_en = false,
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#endif
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},
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.mode = I2S_MODE_MASTER | I2S_MODE_TX,
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.sample_rate = SAMPLE_RATE,
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.bits_per_sample = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
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.communication_format = I2S_COMM_FORMAT_STAND_I2S,
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.dma_buf_count = 6,
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.dma_buf_len = 100,
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.use_apll = 0,
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@@ -330,20 +260,11 @@ TEST_CASE("I2S write and read test(master tx and slave rx)", "[i2s]")
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printf("\r\nheap size: %d\n", esp_get_free_heap_size());
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i2s_config_t slave_i2s_config = {
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.param_cfg = {
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.mode = I2S_MODE_SLAVE | I2S_MODE_RX,
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.sample_rate = SAMPLE_RATE,
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.slot_bits_cfg = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
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.communication_format = I2S_COMM_FORMAT_STAND_I2S,
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#if SOC_I2S_SUPPORTS_TDM
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.slot_channel_cfg = (2 << SLOT_CH_SHIFT) | 2,
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.active_slot_mask = I2S_TDM_ACTIVE_CH0 | I2S_TDM_ACTIVE_CH1,
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.left_align_en = false,
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.big_edin_en = false,
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.bit_order_msb_en = false,
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#endif
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},
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.mode = I2S_MODE_SLAVE | I2S_MODE_RX,
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.sample_rate = SAMPLE_RATE,
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.bits_per_sample = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
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.communication_format = I2S_COMM_FORMAT_STAND_I2S,
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.dma_buf_count = 6,
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.dma_buf_len = 100,
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.use_apll = 0,
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@@ -374,6 +295,7 @@ TEST_CASE("I2S write and read test(master tx and slave rx)", "[i2s]")
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int end_position = 0;
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// write data to slave
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i2s_write(I2S_NUM_0, data_wr, sizeof(uint8_t)*400, &i2s_bytes_write, 1000 / portTICK_PERIOD_MS);
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printf("write data size: %d\n", i2s_bytes_write);
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while(!flag){
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i2s_read(I2S_NUM_1, i2s_read_buff + length, sizeof(uint8_t)*500, &bytes_read, 1000/portMAX_DELAY);
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if(bytes_read>0) {
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@@ -402,20 +324,11 @@ TEST_CASE("I2S write and read test(master rx and slave tx)", "[i2s]")
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{
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// master driver installed and send data
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i2s_config_t master_i2s_config = {
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.param_cfg = {
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.mode = I2S_MODE_MASTER | I2S_MODE_RX,
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.sample_rate = SAMPLE_RATE,
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.slot_bits_cfg = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
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.communication_format = I2S_COMM_FORMAT_STAND_I2S,
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#if SOC_I2S_SUPPORTS_TDM
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.slot_channel_cfg = (2 << SLOT_CH_SHIFT) | 2,
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.active_slot_mask = I2S_TDM_ACTIVE_CH0 | I2S_TDM_ACTIVE_CH1,
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.left_align_en = false,
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.big_edin_en = false,
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.bit_order_msb_en = false,
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#endif
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},
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.mode = I2S_MODE_MASTER | I2S_MODE_RX,
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.sample_rate = SAMPLE_RATE,
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.bits_per_sample = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
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.communication_format = I2S_COMM_FORMAT_STAND_I2S,
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.dma_buf_count = 6,
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.dma_buf_len = 100,
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.use_apll = 1,
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@@ -433,20 +346,11 @@ TEST_CASE("I2S write and read test(master rx and slave tx)", "[i2s]")
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printf("\r\nheap size: %d\n", esp_get_free_heap_size());
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i2s_config_t slave_i2s_config = {
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.param_cfg = {
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.mode = I2S_MODE_SLAVE | I2S_MODE_TX, // Only RX
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.sample_rate = SAMPLE_RATE,
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.slot_bits_cfg = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, //2-channels
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.communication_format = I2S_COMM_FORMAT_STAND_I2S,
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#if SOC_I2S_SUPPORTS_TDM
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.slot_channel_cfg = (2 << SLOT_CH_SHIFT) | 2,
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.active_slot_mask = I2S_TDM_ACTIVE_CH0 | I2S_TDM_ACTIVE_CH1,
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.left_align_en = false,
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.big_edin_en = false,
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.bit_order_msb_en = false,
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#endif
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},
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.mode = I2S_MODE_SLAVE | I2S_MODE_TX, // Only RX
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.sample_rate = SAMPLE_RATE,
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.bits_per_sample = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, //2-channels
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.communication_format = I2S_COMM_FORMAT_STAND_I2S,
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.dma_buf_count = 6,
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.dma_buf_len = 100,
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.use_apll = 1,
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@@ -474,7 +378,7 @@ TEST_CASE("I2S write and read test(master rx and slave tx)", "[i2s]")
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}
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// slave write data to master
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i2s_write(I2S_NUM_1, data_wr, sizeof(uint8_t)*400, &i2s_bytes_write, 1000 / portTICK_PERIOD_MS);
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printf("write data size: %d\n", i2s_bytes_write);
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int flag=0; // break loop flag
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int end_position = 0;
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// write data to slave
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@@ -505,20 +409,11 @@ TEST_CASE("I2S write and read test(master rx and slave tx)", "[i2s]")
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TEST_CASE("I2S memory leaking test", "[i2s]")
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{
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i2s_config_t master_i2s_config = {
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.param_cfg = {
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||||
.mode = I2S_MODE_MASTER | I2S_MODE_RX,
|
||||
.sample_rate = SAMPLE_RATE,
|
||||
.slot_bits_cfg = SAMPLE_BITS,
|
||||
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
|
||||
.communication_format = I2S_COMM_FORMAT_STAND_I2S,
|
||||
#if SOC_I2S_SUPPORTS_TDM
|
||||
.slot_channel_cfg = (2 << SLOT_CH_SHIFT) | 2,
|
||||
.active_slot_mask = I2S_TDM_ACTIVE_CH0 | I2S_TDM_ACTIVE_CH1,
|
||||
.left_align_en = false,
|
||||
.big_edin_en = false,
|
||||
.bit_order_msb_en = false,
|
||||
#endif
|
||||
},
|
||||
.mode = I2S_MODE_MASTER | I2S_MODE_RX,
|
||||
.sample_rate = SAMPLE_RATE,
|
||||
.bits_per_sample = SAMPLE_BITS,
|
||||
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
|
||||
.communication_format = I2S_COMM_FORMAT_STAND_I2S,
|
||||
.dma_buf_count = 6,
|
||||
.dma_buf_len = 100,
|
||||
.use_apll = 0,
|
||||
@@ -561,20 +456,11 @@ TEST_CASE("I2S APLL clock variation test", "[i2s]")
|
||||
};
|
||||
|
||||
i2s_config_t i2s_config = {
|
||||
.param_cfg = {
|
||||
.mode = I2S_MODE_MASTER | I2S_MODE_TX,
|
||||
.sample_rate = SAMPLE_RATE,
|
||||
.slot_bits_cfg = SAMPLE_BITS,
|
||||
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
|
||||
.communication_format = I2S_COMM_FORMAT_STAND_I2S,
|
||||
#if SOC_I2S_SUPPORTS_TDM
|
||||
.slot_channel_cfg = (2 << SLOT_CH_SHIFT) | 2,
|
||||
.active_slot_mask = I2S_TDM_ACTIVE_CH0 | I2S_TDM_ACTIVE_CH1,
|
||||
.left_align_en = false,
|
||||
.big_edin_en = false,
|
||||
.bit_order_msb_en = false,
|
||||
#endif
|
||||
},
|
||||
.mode = I2S_MODE_MASTER | I2S_MODE_TX,
|
||||
.sample_rate = SAMPLE_RATE,
|
||||
.bits_per_sample = SAMPLE_BITS,
|
||||
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
|
||||
.communication_format = I2S_COMM_FORMAT_STAND_I2S,
|
||||
.dma_buf_count = 6,
|
||||
.dma_buf_len = 60,
|
||||
.use_apll = true,
|
||||
@@ -591,8 +477,8 @@ TEST_CASE("I2S APLL clock variation test", "[i2s]")
|
||||
|
||||
for (int i = 0; i < (sizeof(sample_rate_arr)/sizeof(sample_rate_arr[0])); i++) {
|
||||
for (int j = 0; j < (sizeof(bits_per_sample_arr)/sizeof(bits_per_sample_arr[0])); j++) {
|
||||
i2s_config.param_cfg.sample_rate = sample_rate_arr[i];
|
||||
i2s_config.param_cfg.slot_bits_cfg = bits_per_sample_arr[j];
|
||||
i2s_config.sample_rate = sample_rate_arr[i];
|
||||
i2s_config.bits_per_sample = bits_per_sample_arr[j];
|
||||
|
||||
TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
|
||||
TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
|
||||
@@ -606,4 +492,93 @@ TEST_CASE("I2S APLL clock variation test", "[i2s]")
|
||||
TEST_ASSERT(initial_size == esp_get_free_heap_size());
|
||||
}
|
||||
|
||||
#if DISABLED_FOR_TARGETS(ESP32)
|
||||
/* Only ESP32 need I2S adc/dac test */
|
||||
TEST_CASE("I2S adc test", "[i2s]")
|
||||
{
|
||||
// init I2S ADC
|
||||
i2s_config_t i2s_config = {
|
||||
.mode = I2S_MODE_MASTER | I2S_MODE_RX | I2S_MODE_ADC_BUILT_IN,
|
||||
.sample_rate = SAMPLE_RATE,
|
||||
.bits_per_sample = SAMPLE_BITS,
|
||||
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
|
||||
.intr_alloc_flags = 0,
|
||||
.dma_buf_count = 2,
|
||||
.dma_buf_len = 1024,
|
||||
.use_apll = 0,
|
||||
};
|
||||
// install and start I2S driver
|
||||
i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL);
|
||||
// init ADC pad
|
||||
i2s_set_adc_mode(ADC_UNIT_1, ADC1_CHANNEL_4);
|
||||
// enable adc sampling, ADC_WIDTH_BIT_12, ADC_ATTEN_DB_11 hard-coded in adc_i2s_mode_init
|
||||
i2s_adc_enable(I2S_NUM_0);
|
||||
// init read buffer
|
||||
uint16_t* i2sReadBuffer = (uint16_t*)calloc(1024, sizeof(uint16_t));
|
||||
size_t bytesRead;
|
||||
|
||||
for (int loop = 0; loop < 10; loop++) {
|
||||
for (int level = 0; level <= 1; level++) {
|
||||
if (level == 0) {
|
||||
gpio_set_pull_mode(ADC1_CHANNEL_4_IO, GPIO_PULLDOWN_ONLY);
|
||||
} else {
|
||||
gpio_set_pull_mode(ADC1_CHANNEL_4_IO, GPIO_PULLUP_ONLY);
|
||||
}
|
||||
vTaskDelay(200 / portTICK_RATE_MS);
|
||||
// read data from adc, will block until buffer is full
|
||||
i2s_read(I2S_NUM_0, (void*)i2sReadBuffer, 1024 * sizeof(uint16_t), &bytesRead, portMAX_DELAY);
|
||||
|
||||
// calc average
|
||||
int64_t adcSumValue = 0;
|
||||
for (size_t i = 0; i < 1024; i++) {
|
||||
adcSumValue += i2sReadBuffer[i] & 0xfff;
|
||||
}
|
||||
int adcAvgValue = adcSumValue / 1024;
|
||||
printf("adc average val: %d\n", adcAvgValue);
|
||||
|
||||
if (level == 0) {
|
||||
if (adcAvgValue > 100) {
|
||||
i2s_adc_disable(I2S_NUM_0);
|
||||
free(i2sReadBuffer);
|
||||
i2s_driver_uninstall(I2S_NUM_0);
|
||||
TEST_ASSERT_LESS_THAN(100, adcAvgValue);
|
||||
}
|
||||
} else {
|
||||
if (adcAvgValue < 4000) {
|
||||
i2s_adc_disable(I2S_NUM_0);
|
||||
free(i2sReadBuffer);
|
||||
i2s_driver_uninstall(I2S_NUM_0);
|
||||
TEST_ASSERT_GREATER_THAN(4000, adcAvgValue);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
i2s_adc_disable(I2S_NUM_0);
|
||||
free(i2sReadBuffer);
|
||||
i2s_driver_uninstall(I2S_NUM_0);
|
||||
}
|
||||
|
||||
TEST_CASE("I2S dac test", "[i2s]")
|
||||
{
|
||||
// dac, adc i2s
|
||||
i2s_config_t i2s_config = {
|
||||
.mode = I2S_MODE_MASTER | I2S_MODE_TX,
|
||||
.sample_rate = SAMPLE_RATE,
|
||||
.bits_per_sample = SAMPLE_BITS,
|
||||
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
|
||||
.communication_format = I2S_COMM_FORMAT_STAND_I2S,
|
||||
.dma_buf_count = 6,
|
||||
.dma_buf_len = 60,
|
||||
.use_apll = 0,
|
||||
.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
|
||||
};
|
||||
|
||||
//install and start i2s driver
|
||||
TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
|
||||
//for internal DAC, this will enable both of the internal channels
|
||||
TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, NULL));
|
||||
//stop & destroy i2s driver
|
||||
TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
|
||||
}
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user