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adc: add comment for ADC sampling frequency

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This commit is contained in:
Armando
2021-01-05 11:00:05 +08:00
committed by bot
parent d8a4b247b9
commit f9ec7ddda3
4 changed files with 19 additions and 22 deletions
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2
components/driver/esp32c3/adc.c
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@@ -531,7 +531,7 @@ esp_err_t adc_digi_controller_config(const adc_digi_config_t *config)
if (!s_adc_digi_ctx) { if (!s_adc_digi_ctx) {
return ESP_ERR_INVALID_STATE; return ESP_ERR_INVALID_STATE;
} }
ADC_CHECK(config->sample_freq_hz <= 83333 && config->sample_freq_hz >= 610, "ADC sampling frequency out of range", ESP_ERR_INVALID_ARG); ADC_CHECK(config->sample_freq_hz <= SOC_ADC_SAMPLE_FREQ_THRES_HIGH && config->sample_freq_hz >= SOC_ADC_SAMPLE_FREQ_THRES_LOW, "ADC sampling frequency out of range", ESP_ERR_INVALID_ARG);
s_adc_digi_ctx->digi_controller_config.conv_limit_en = config->conv_limit_en; s_adc_digi_ctx->digi_controller_config.conv_limit_en = config->conv_limit_en;
s_adc_digi_ctx->digi_controller_config.conv_limit_num = config->conv_limit_num; s_adc_digi_ctx->digi_controller_config.conv_limit_num = config->conv_limit_num;

9
components/hal/include/hal/adc_types.h
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@@ -286,12 +286,11 @@ typedef struct {
If the number of measurements reaches `dma_eof_num`, then `dma_in_suc_eof` signal is generated in DMA. If the number of measurements reaches `dma_eof_num`, then `dma_in_suc_eof` signal is generated in DMA.
Note: The converted data in the DMA in link buffer will be multiple of two bytes. */ Note: The converted data in the DMA in link buffer will be multiple of two bytes. */
#elif CONFIG_IDF_TARGET_ESP32C3 #elif CONFIG_IDF_TARGET_ESP32C3
uint32_t sample_freq_hz; /*!< The expected ADC sampling frequency in Hz. Range: 610Hz ~ 83333Hz uint32_t sample_freq_hz; /*!< The expected ADC sampling frequency in Hz. Range: 611Hz ~ 83333Hz
Fs: sampling frequency;
Fd: digital controller frequency
interval: interval between 2 measurement trigger signal
Fs = Fd / interval / 2 Fs = Fd / interval / 2
Range: the smallest interval should not be smaller than the ADC measurement period. The largest interval should not be larger than 4095. */ Fs: sampling frequency;
Fd: digital controller frequency, no larger than 5M for better performance
interval: interval between 2 measurement trigger signal, the smallest interval should not be smaller than the ADC measurement period, the largest interval should not be larger than 4095 */
#endif #endif
} adc_digi_config_t; } adc_digi_config_t;

10
components/soc/esp32c3/include/soc/soc_caps.h
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@@ -109,14 +109,10 @@
#define SOC_ADC_MAX_BITWIDTH (12) #define SOC_ADC_MAX_BITWIDTH (12)
#define SOC_ADC_DIGI_FILTER_NUM (2) #define SOC_ADC_DIGI_FILTER_NUM (2)
#define SOC_ADC_DIGI_MONITOR_NUM (2) #define SOC_ADC_DIGI_MONITOR_NUM (2)
/**
* Check if adc support digital controller (DMA) mode.
* @value
* - 1 : support;
* - 0 : not support;
*/
#define SOC_ADC_SUPPORT_DMA_MODE(PERIPH_NUM) 1 #define SOC_ADC_SUPPORT_DMA_MODE(PERIPH_NUM) 1
//F_sample = F_digi_con / 2 / interval. F_digi_con = 5M for now. 30 <= interva <= 4095
#define SOC_ADC_SAMPLE_FREQ_THRES_HIGH 83333
#define SOC_ADC_SAMPLE_FREQ_THRES_LOW 611
/*-------------------------- APB BACKUP DMA CAPS -------------------------------*/ /*-------------------------- APB BACKUP DMA CAPS -------------------------------*/
#define SOC_APB_BACKUP_DMA (1) #define SOC_APB_BACKUP_DMA (1)

4
examples/peripherals/adc/adc_dma/main/adc_dma_example_main.c
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@@ -25,10 +25,12 @@ static void continuous_adc_init(uint16_t adc1_chan_mask, uint16_t adc2_chan_mask
assert(ret == ESP_OK); assert(ret == ESP_OK);
adc_digi_pattern_table_t adc_pattern[10] = {0}; adc_digi_pattern_table_t adc_pattern[10] = {0};
//Do not set the sampling frequency out of the range between `SOC_ADC_SAMPLE_FREQ_THRES_LOW` and `SOC_ADC_SAMPLE_FREQ_THRES_HIGH`
adc_digi_config_t dig_cfg = { adc_digi_config_t dig_cfg = {
.conv_limit_en = 0, .conv_limit_en = 0,
.conv_limit_num = 250, .conv_limit_num = 250,
.sample_freq_hz = 83333, .sample_freq_hz = 620,
}; };
dig_cfg.adc_pattern_len = channel_num; dig_cfg.adc_pattern_len = channel_num;