fix(spi_flash): Fix that internal RAM has no enough space to put all stuff inside

components/spi_flash/esp_flash_api.c

@@ -1195,6 +1195,21 @@ IRAM_ATTR esp_err_t esp_flash_set_io_mode(esp_flash_t* chip, bool qe)
 }
 #endif //CONFIG_SPI_FLASH_ROM_IMPL
 
+FORCE_INLINE_ATTR esp_err_t s_encryption_write_lock(esp_flash_t *chip) {
+#if CONFIG_IDF_TARGET_ESP32S2
+    esp_crypto_dma_lock_acquire();
+#endif //CONFIG_IDF_TARGET_ESP32S2
+    return rom_spiflash_api_funcs->start(chip);
+}
+
+FORCE_INLINE_ATTR esp_err_t s_encryption_write_unlock(esp_flash_t *chip) {
+#if CONFIG_IDF_TARGET_ESP32S2
+    esp_crypto_dma_lock_release();
+#endif //CONFIG_IDF_TARGET_ESP32S2
+    return rom_spiflash_api_funcs->end(chip, ESP_OK);
+}
+
+
 #if !CONFIG_SPI_FLASH_ROM_IMPL || ESP_ROM_HAS_ENCRYPTED_WRITES_USING_LEGACY_DRV
 // use `esp_flash_write_encrypted` ROM version not in C3 and S3
 
@@ -1234,13 +1249,15 @@ esp_err_t IRAM_ATTR esp_flash_write_encrypted(esp_flash_t *chip, uint32_t addres
 
     bool bus_acquired = false;
 
-    // Copy buffer to IRAM.
-    uint8_t *ssrc = (uint8_t*)heap_caps_calloc(1, length, MALLOC_CAP_INTERNAL);
-    if (ssrc == NULL) {
-        ESP_DRAM_LOGE(TAG, "No extra memory for encryption flash write");
-        return ESP_ERR_NO_MEM;
-    }
-    memcpy(ssrc, buffer, length);
+    bool lock_once = true;
+    const uint8_t *ssrc = (const uint8_t *)buffer;
+
+    /* For buffer in internal RAM already, we only need to lock only once.
+       While for buffer in flash, we need to copy data from flash to internal RAM before
+       encrypted write every time. That means we need to lock/unlock before/after encrypted
+       write every time.
+    */
+    lock_once = esp_ptr_in_dram(buffer);
 
     COUNTER_START();
 
@@ -1271,15 +1288,15 @@ esp_err_t IRAM_ATTR esp_flash_write_encrypted(esp_flash_t *chip, uint32_t addres
     }
 #endif
 
-#if CONFIG_IDF_TARGET_ESP32S2
-    esp_crypto_dma_lock_acquire();
-#endif //CONFIG_IDF_TARGET_ESP32S2
-
-    err = rom_spiflash_api_funcs->start(chip);
-    if (err != ESP_OK) {
-        goto restore_cache;
+    if (lock_once == true) {
+        err = s_encryption_write_lock(chip);
+        if (err != ESP_OK) {
+            ESP_DRAM_LOGE(TAG, "flash acquire lock failed");
+            return err;
+        }
+        bus_acquired = true;
     }
-    bus_acquired = true;
+
     for (size_t i = 0; i < length; i += row_size_length) {
         uint32_t row_addr = address + i;
         uint8_t row_size;
@@ -1334,47 +1351,50 @@ esp_err_t IRAM_ATTR esp_flash_write_encrypted(esp_flash_t *chip, uint32_t addres
         }
 #endif  //#if CONFIG_SPI_FLASH_WARN_SETTING_ZERO_TO_ONE
 
+        if (lock_once == false) {
+            err = s_encryption_write_lock(chip);
+            if (err != ESP_OK) {
+                goto restore_cache;
+            }
+            bus_acquired = true;
+        }
+
         err = chip->chip_drv->write_encrypted(chip, (uint32_t *)encrypt_buf, row_addr, encrypt_byte);
         if (err!= ESP_OK) {
-            rom_spiflash_api_funcs->end(chip, ESP_OK);
-#if CONFIG_IDF_TARGET_ESP32S2
-            esp_crypto_dma_lock_release();
-#endif //CONFIG_IDF_TARGET_ESP32S2
-            bus_acquired = false;
-            assert(bus_acquired);
             //Error happens, we end flash operation. Re-enable cache and flush it
             goto restore_cache;
         }
+        if (lock_once == false) {
+            err = s_encryption_write_unlock(chip);
+            if (err != ESP_OK) {
+                bus_acquired = false;
+                //Error happens, we end flash operation. Re-enable cache and flush it
+                goto restore_cache;
+            }
+            bus_acquired = false;
+        }
 
         COUNTER_ADD_BYTES(write, encrypt_byte);
 
 #if CONFIG_SPI_FLASH_VERIFY_WRITE
         err = s_verify_write(chip, row_addr, encrypt_byte, (uint32_t *)encrypt_buf, is_encrypted);
         if (err != ESP_OK) {
-            rom_spiflash_api_funcs->end(chip, ESP_OK);
-#if CONFIG_IDF_TARGET_ESP32S2
-            esp_crypto_dma_lock_release();
-#endif //CONFIG_IDF_TARGET_ESP32S2
             //Error happens, we end flash operation. Re-enable cache and flush it
             goto restore_cache;
         }
 #endif //CONFIG_SPI_FLASH_VERIFY_WRITE
     }
 
-    err = rom_spiflash_api_funcs->end(chip, ESP_OK);
-#if CONFIG_IDF_TARGET_ESP32S2
-    esp_crypto_dma_lock_release();
-#endif //CONFIG_IDF_TARGET_ESP32S2
-    if (err != ESP_OK) {
-        bus_acquired = false;
-        //Error happens, we end flash operation. Re-enable cache and flush it
-        goto restore_cache;
+    if (lock_once == true) {
+        err = s_encryption_write_unlock(chip);
+        if (err != ESP_OK) {
+            bus_acquired = false;
+            //Error happens, we end flash operation. Re-enable cache and flush it
+            goto restore_cache;
+        }
     }
-    bus_acquired = false;
 
-    if(ssrc) {
-        free(ssrc);
-    }
+    bus_acquired = false;
 
     COUNTER_STOP(write);
     err = rom_spiflash_api_funcs->flash_end_flush_cache(chip, err, bus_acquired, address, length);
@@ -1382,9 +1402,8 @@ esp_err_t IRAM_ATTR esp_flash_write_encrypted(esp_flash_t *chip, uint32_t addres
     return err;
 
 restore_cache:
-    if(ssrc) {
-        free(ssrc);
-    }
+    s_encryption_write_unlock(chip);
+    bus_acquired = false;
     COUNTER_STOP(write);
     ret = rom_spiflash_api_funcs->flash_end_flush_cache(chip, err, bus_acquired, address, length);
     if (ret != ESP_OK) {