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Merge branch 'bugfix/fix_uart_reset_issue_on_esp32c3' into 'master'
bugfix(uart): reset uart0 core before uart apb reset Closes IDF-3362 See merge request espressif/esp-idf!12749
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@@ -187,10 +187,19 @@ static void uart_module_enable(uart_port_t uart_num)
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{
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UART_ENTER_CRITICAL(&(uart_context[uart_num].spinlock));
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if (uart_context[uart_num].hw_enabled != true) {
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if (uart_num != CONFIG_ESP_CONSOLE_UART_NUM) {
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periph_module_reset(uart_periph_signal[uart_num].module);
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}
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periph_module_enable(uart_periph_signal[uart_num].module);
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if (uart_num != CONFIG_ESP_CONSOLE_UART_NUM) {
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// Workaround for ESP32C3: enable core reset
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// before enabling uart module clock
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// to prevent uart output garbage value.
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#if SOC_UART_REQUIRE_CORE_RESET
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uart_hal_set_reset_core(&(uart_context[uart_num].hal), true);
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periph_module_reset(uart_periph_signal[uart_num].module);
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uart_hal_set_reset_core(&(uart_context[uart_num].hal), false);
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#else
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periph_module_reset(uart_periph_signal[uart_num].module);
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#endif
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}
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uart_context[uart_num].hw_enabled = true;
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}
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UART_EXIT_CRITICAL(&(uart_context[uart_num].spinlock));
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