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modify csv & generate

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update efuse_reg.h & efuse_struct.h & references in rst file
This commit is contained in:
wuzhenghui
2021-09-17 10:42:04 +08:00
committed by bot
parent 625bd4f767
commit fd5a63f31e
11 changed files with 45 additions and 80 deletions
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11
components/efuse/esp32c3/esp_efuse_table.c
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@@ -17,7 +17,7 @@
#include <assert.h>
#include "esp_efuse_table.h"
// md5_digest_table 7e5a29e190c8e3a63e1a85a40b50c355
// md5_digest_table fe80e03d1417e5757ef89923f8d01d33
// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
// If you want to change some fields, you need to change esp_efuse_table.csv file
// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -155,10 +155,6 @@ static const esp_efuse_desc_t RD_DIS_SYS_DATA_PART2[] = {
{EFUSE_BLK0, 38, 1}, // Read protection for EFUSE_BLK10. SYS_DATA_PART2,
};
static const esp_efuse_desc_t DIS_RTC_RAM_BOOT[] = {
{EFUSE_BLK0, 39, 1}, // Disable boot from RTC RAM,
};
static const esp_efuse_desc_t DIS_ICACHE[] = {
{EFUSE_BLK0, 40, 1}, // Disable Icache,
};
@@ -677,11 +673,6 @@ const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_SYS_DATA_PART2[] = {
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_DIS_RTC_RAM_BOOT[] = {
&DIS_RTC_RAM_BOOT[0], // Disable boot from RTC RAM
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_DIS_ICACHE[] = {
&DIS_ICACHE[0], // Disable Icache
NULL