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feat(twai): c5 twaifd low level support and deprecate old types header

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This commit is contained in:
wanckl
2024-08-15 19:22:13 +08:00
parent 05db66bf78
commit fe48cbc3c0
19 changed files with 1366 additions and 308 deletions
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36
components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
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@@ -1215,6 +1215,42 @@ config SOC_MWDT_SUPPORT_SLEEP_RETENTION
bool
default y
config SOC_TWAI_CONTROLLER_NUM
int
default 2
config SOC_TWAI_MASK_FILTER_NUM
int
default 3
config SOC_TWAI_RANGE_FILTER_NUM
int
default 1
config SOC_TWAI_BRP_MIN
int
default 1
config SOC_TWAI_BRP_MAX
int
default 255
config SOC_TWAI_CLK_SUPPORT_XTAL
bool
default y
config SOC_TWAI_SUPPORTS_RX_STATUS
bool
default y
config SOC_TWAI_SUPPORT_FD
bool
default y
config SOC_TWAI_SUPPORT_TIMESTAMP
bool
default y
config SOC_EFUSE_ECDSA_KEY
bool
default y

9
components/soc/esp32c5/include/soc/clk_tree_defs.h
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@@ -407,14 +407,15 @@ typedef enum {
/**
* @brief Array initializer for all supported clock sources of TWAI
*/
#define SOC_TWAI_CLKS {SOC_MOD_CLK_XTAL}
#define SOC_TWAI_CLKS {SOC_MOD_CLK_XTAL, SOC_MOD_CLK_RC_FAST}
/**
* @brief TWAI clock source
*/
typedef enum { // TODO: [ESP32C5] IDF-8691, IDF-8692 (inherit from C6)
TWAI_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the source clock */
TWAI_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the default clock choice */
typedef enum {
TWAI_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the source clock */
TWAI_CLK_SRC_RC_FAST = SOC_MOD_CLK_RC_FAST, /*!< Select RC_FAST as the source clock */
TWAI_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the default clock choice */
} soc_periph_twai_clk_src_t;
//////////////////////////////////////////////////ADC///////////////////////////////////////////////////////////////////

14
components/soc/esp32c5/include/soc/soc_caps.h
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@@ -494,11 +494,15 @@
#define SOC_MWDT_SUPPORT_SLEEP_RETENTION (1)
/*-------------------------- TWAI CAPS ---------------------------------------*/
// #define SOC_TWAI_CONTROLLER_NUM 2
// #define SOC_TWAI_CLK_SUPPORT_XTAL 1
// #define SOC_TWAI_BRP_MIN 2
// #define SOC_TWAI_BRP_MAX 32768
// #define SOC_TWAI_SUPPORTS_RX_STATUS 1
#define SOC_TWAI_CONTROLLER_NUM 2
#define SOC_TWAI_MASK_FILTER_NUM 3
#define SOC_TWAI_RANGE_FILTER_NUM 1U
#define SOC_TWAI_BRP_MIN 1U
#define SOC_TWAI_BRP_MAX 255
#define SOC_TWAI_CLK_SUPPORT_XTAL 1
#define SOC_TWAI_SUPPORTS_RX_STATUS 1
#define SOC_TWAI_SUPPORT_FD 1
#define SOC_TWAI_SUPPORT_TIMESTAMP 1
/*-------------------------- eFuse CAPS----------------------------*/
// #define SOC_EFUSE_DIS_DOWNLOAD_ICACHE 1

99
components/soc/esp32c5/register/soc/pcr_struct.h
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@@ -267,93 +267,49 @@ typedef union {
uint32_t val;
} pcr_i2c_sclk_conf_reg_t;
/** Type of twai0_conf register
* TWAI0 configuration register
/** Type of twai_conf register
* TWAI configuration register
*/
typedef union {
struct {
/** twai0_clk_en : R/W; bitpos: [0]; default: 0;
* Set 1 to enable twai0 apb clock
/** twai_clk_en : R/W; bitpos: [0]; default: 0;
* Set 1 to enable twai apb clock
*/
uint32_t twai0_clk_en:1;
/** twai0_rst_en : R/W; bitpos: [1]; default: 0;
* Set 0 to reset twai0 module
uint32_t twai_clk_en:1;
/** twai_rst_en : R/W; bitpos: [1]; default: 0;
* Set 0 to reset twai module
*/
uint32_t twai0_rst_en:1;
/** twai0_ready : RO; bitpos: [2]; default: 1;
* Query this field after reset twai0 module
uint32_t twai_rst_en:1;
/** twai_ready : RO; bitpos: [2]; default: 1;
* Query this field after reset twai module
*/
uint32_t twai0_ready:1;
uint32_t twai_ready:1;
uint32_t reserved_3:29;
};
uint32_t val;
} pcr_twai0_conf_reg_t;
} pcr_twai_conf_reg_t;
/** Type of twai0_func_clk_conf register
* TWAI0_FUNC_CLK configuration register
/** Type of twai_func_clk_conf register
* TWAI_FUNC_CLK configuration register
*/
typedef union {
struct {
uint32_t reserved_0:20;
/** twai0_func_clk_sel : R/W; bitpos: [20]; default: 0;
* Configures the clock source of TWAI0.\\
/** twai_func_clk_sel : R/W; bitpos: [20]; default: 0;
* Configures the clock source of TWAI.\\
* 0 (default): XTAL_CLK\\
* 1: RC_FAST_CLK\\
*/
uint32_t twai0_func_clk_sel:1;
uint32_t twai_func_clk_sel:1;
uint32_t reserved_21:1;
/** twai0_func_clk_en : R/W; bitpos: [22]; default: 0;
* Set 1 to enable twai0 function clock
/** twai_func_clk_en : R/W; bitpos: [22]; default: 0;
* Set 1 to enable twai function clock
*/
uint32_t twai0_func_clk_en:1;
uint32_t twai_func_clk_en:1;
uint32_t reserved_23:9;
};
uint32_t val;
} pcr_twai0_func_clk_conf_reg_t;
/** Type of twai1_conf register
* TWAI1 configuration register
*/
typedef union {
struct {
/** twai1_clk_en : R/W; bitpos: [0]; default: 0;
* Set 1 to enable twai1 apb clock
*/
uint32_t twai1_clk_en:1;
/** twai1_rst_en : R/W; bitpos: [1]; default: 0;
* Set 0 to reset twai1 module
*/
uint32_t twai1_rst_en:1;
/** twai1_ready : RO; bitpos: [2]; default: 1;
* Query this field after reset twai1 module
*/
uint32_t twai1_ready:1;
uint32_t reserved_3:29;
};
uint32_t val;
} pcr_twai1_conf_reg_t;
/** Type of twai1_func_clk_conf register
* TWAI1_FUNC_CLK configuration register
*/
typedef union {
struct {
uint32_t reserved_0:20;
/** twai1_func_clk_sel : R/W; bitpos: [20]; default: 0;
* Configures the clock source of TWAI1.\\
* 0 (default): XTAL_CLK\\
* 1: RC_FAST_CLK\\
*/
uint32_t twai1_func_clk_sel:1;
uint32_t reserved_21:1;
/** twai1_func_clk_en : R/W; bitpos: [22]; default: 0;
* Set 1 to enable twai1 function clock
*/
uint32_t twai1_func_clk_en:1;
uint32_t reserved_23:9;
};
uint32_t val;
} pcr_twai1_func_clk_conf_reg_t;
} pcr_twai_func_clk_conf_reg_t;
/** Type of uhci_conf register
* UHCI configuration register
@@ -2329,6 +2285,14 @@ typedef struct {
pcr_i2c_sclk_conf_reg_t i2c_sclk_conf;
} pcr_i2c_reg_t;
/**
* @brief The struct of TWAI configuration registers
*/
typedef struct {
pcr_twai_conf_reg_t twai_conf;
pcr_twai_func_clk_conf_reg_t twai_func_clk_conf;
} pcr_twai_reg_t;
typedef struct {
volatile pcr_uart0_conf_reg_t uart0_conf;
volatile pcr_uart0_sclk_conf_reg_t uart0_sclk_conf;
@@ -2339,10 +2303,7 @@ typedef struct {
volatile pcr_mspi_conf_reg_t mspi_conf;
volatile pcr_mspi_clk_conf_reg_t mspi_clk_conf;
volatile pcr_i2c_reg_t i2c[1];
volatile pcr_twai0_conf_reg_t twai0_conf;
volatile pcr_twai0_func_clk_conf_reg_t twai0_func_clk_conf;
volatile pcr_twai1_conf_reg_t twai1_conf;
volatile pcr_twai1_func_clk_conf_reg_t twai1_func_clk_conf;
volatile pcr_twai_reg_t twai[2];
volatile pcr_uhci_conf_reg_t uhci_conf;
volatile pcr_rmt_conf_reg_t rmt_conf;
volatile pcr_rmt_sclk_conf_reg_t rmt_sclk_conf;

167
components/soc/esp32c5/register/soc/twaifd_struct.h
View File

@@ -1299,107 +1299,39 @@ typedef union {
/** Group: filter register */
/** Type of filter_a_mask register
* TWAI FD filter A mask value register
/** Type of filter_mask register
* TWAI FD filter mask value register
*/
typedef union {
struct {
/** bit_mask_a_val : R/W; bitpos: [28:0]; default: 0;
* Filter A mask. The identifier format is the same as in IDENTIFIER_W of TXT buffer
/** bit_mask_val : R/W; bitpos: [28:0]; default: 0;
* Filter mask. The identifier format is the same as in IDENTIFIER_W of TXT buffer
* or RX
* buffer. If filter A is not present, writes to this register have no effect and read
* buffer. If filter is not present, writes to this register have no effect and read
* will return all zeroes.
*/
uint32_t bit_mask_a_val:29;
uint32_t bit_mask_val:29;
uint32_t reserved_29:3;
};
uint32_t val;
} twaifd_filter_a_mask_reg_t;
} twaifd_filter_mask_reg_t;
/** Type of filter_a_val register
* TWAI FD filter A bit value register
/** Type of filter_val register
* TWAI FD filter bit value register
*/
typedef union {
struct {
/** bit_val_a_val : R/W; bitpos: [28:0]; default: 0;
* Filter A value. The identifier format is the same as in IDENTIFIER_W of TXT buffer
/** bit_val : R/W; bitpos: [28:0]; default: 0;
* Filter value. The identifier format is the same as in IDENTIFIER_W of TXT buffer
* or RX buffer.
* If filter A is not present, writes to this register have no effect and read will
* If filter is not present, writes to this register have no effect and read will
* return all zeroes.
*/
uint32_t bit_val_a_val:29;
uint32_t bit_val:29;
uint32_t reserved_29:3;
};
uint32_t val;
} twaifd_filter_a_val_reg_t;
/** Type of filter_b_mask register
* TWAI FD filter B mask value register
*/
typedef union {
struct {
/** bit_mask_b_val : R/W; bitpos: [28:0]; default: 0;
* Filter B mask. The identifier format is the same as in IDENTIFIER_W of TXT buffer
* or RX
* buffer. If filter A is not present, writes to this register have no effect and read
* will return all zeroes.
*/
uint32_t bit_mask_b_val:29;
uint32_t reserved_29:3;
};
uint32_t val;
} twaifd_filter_b_mask_reg_t;
/** Type of filter_b_val register
* TWAI FD filter B bit value register
*/
typedef union {
struct {
/** bit_val_b_val : R/W; bitpos: [28:0]; default: 0;
* Filter B value. The identifier format is the same as in IDENTIFIER_W of TXT buffer
* or RX buffer.
* If filter A is not present, writes to this register have no effect and read will
* return all zeroes.
*/
uint32_t bit_val_b_val:29;
uint32_t reserved_29:3;
};
uint32_t val;
} twaifd_filter_b_val_reg_t;
/** Type of filter_c_mask register
* TWAI FD filter C mask value register
*/
typedef union {
struct {
/** bit_mask_c_val : R/W; bitpos: [28:0]; default: 0;
* Filter C mask. The identifier format is the same as in IDENTIFIER_W of TXT buffer
* or RX
* buffer. If filter A is not present, writes to this register have no effect and read
* will return all zeroes.
*/
uint32_t bit_mask_c_val:29;
uint32_t reserved_29:3;
};
uint32_t val;
} twaifd_filter_c_mask_reg_t;
/** Type of filter_c_val register
* TWAI FD filter C bit value register
*/
typedef union {
struct {
/** bit_val_c_val : R/W; bitpos: [28:0]; default: 0;
* Filter C value. The identifier format is the same as in IDENTIFIER_W of TXT buffer
* or RX buffer.
* If filter A is not present, writes to this register have no effect and read will
* return all zeroes.
*/
uint32_t bit_val_c_val:29;
uint32_t reserved_29:3;
};
uint32_t val;
} twaifd_filter_c_val_reg_t;
} twaifd_filter_val_reg_t;
/** Type of filter_ran_low register
* TWAI FD filter range low value register
@@ -1806,6 +1738,63 @@ typedef union {
uint32_t val;
} twaifd_date_ver_reg_t;
/** TWAI bits filter register
*/
typedef struct {
volatile twaifd_filter_mask_reg_t filter_mask;
volatile twaifd_filter_val_reg_t filter_val;
} twaifd_mask_filter_reg_t;
/** TWAI range filter register
*/
typedef struct {
volatile twaifd_filter_ran_low_reg_t ran_low;
volatile twaifd_filter_ran_high_reg_t ran_high;
} twaifd_range_filter_reg_t;
/**
* @brief TWAI frame buffer register types
*/
typedef union {
struct {
union {
struct {
uint32_t dlc: 4; // Data length code (0-15)
uint32_t reserved4: 1; // Reserved bit
uint32_t rtr: 1; // Remote transmission request
uint32_t ide: 1; // Identifier extension bit
uint32_t fdf: 1; // Flexible data-rate format bit
uint32_t reserved8: 1; // Reserved bit
uint32_t brs: 1; // Bit rate switch flag
uint32_t esi: 1; // Error state indicator
uint32_t rwcnt: 5; // Re-transmission counter
uint32_t reserved16: 16; // Reserved bits
};
uint32_t val; // Complete 32-bit register value for format
} format;
union {
struct {
uint32_t identifier_ext: 18; // Extended identifier (18 bits)
uint32_t identifier_base: 11; // Base identifier (11 bits)
uint32_t reserved29: 3; // Reserved bits
};
uint32_t val; // Complete 32-bit register value for identifier
} identifier;
uint32_t timestamp_low; // Lower 32 bits of timestamp
uint32_t timestamp_high; // Upper 32 bits of timestamp
uint32_t data[16]; // Data payload (16 words)
};
uint32_t words[20]; // Raw 32-bit words for direct access
} twaifd_frame_buffer_t;
/** TWAI frame txt buffer registers
*/
typedef struct {
volatile twaifd_frame_buffer_t txt_buffer;
uint32_t reserved_50[44];
} twaifd_frame_mem_t;
typedef struct {
volatile twaifd_device_id_version_reg_t device_id_version;
@@ -1823,14 +1812,8 @@ typedef struct {
volatile twaifd_rec_tec_reg_t rec_tec;
volatile twaifd_err_norm_err_fd_reg_t err_norm_err_fd;
volatile twaifd_ctr_pres_reg_t ctr_pres;
volatile twaifd_filter_a_mask_reg_t filter_a_mask;
volatile twaifd_filter_a_val_reg_t filter_a_val;
volatile twaifd_filter_b_mask_reg_t filter_b_mask;
volatile twaifd_filter_b_val_reg_t filter_b_val;
volatile twaifd_filter_c_mask_reg_t filter_c_mask;
volatile twaifd_filter_c_val_reg_t filter_c_val;
volatile twaifd_filter_ran_low_reg_t filter_ran_low;
volatile twaifd_filter_ran_high_reg_t filter_ran_high;
volatile twaifd_mask_filter_reg_t mask_filters[3];
volatile twaifd_range_filter_reg_t range_filters[1];
volatile twaifd_filter_control_filter_status_reg_t filter_control_filter_status;
volatile twaifd_rx_mem_info_reg_t rx_mem_info;
volatile twaifd_rx_pointers_reg_t rx_pointers;
@@ -1847,7 +1830,9 @@ typedef struct {
volatile twaifd_yolo_reg_t yolo;
volatile twaifd_timestamp_low_reg_t timestamp_low;
volatile twaifd_timestamp_high_reg_t timestamp_high;
uint32_t reserved_09c[974];
uint32_t reserved_09c[25];
volatile twaifd_frame_mem_t txt_mem_cell[8];
uint32_t reserved_900[437];
volatile twaifd_timer_clk_en_reg_t timer_clk_en;
volatile twaifd_timer_int_raw_reg_t timer_int_raw;
volatile twaifd_timer_int_st_reg_t timer_int_st;

31
components/soc/esp32c5/twai_periph.c Normal file
View File

@@ -0,0 +1,31 @@
/*
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/twai_periph.h"
#include "soc/gpio_sig_map.h"
const twai_controller_signal_conn_t twai_controller_periph_signals = {
.controllers = {
[0] = {
.irq_id = ETS_TWAI0_INTR_SOURCE,
.timer_irq_id = ETS_TWAI0_TIMER_INTR_SOURCE,
.tx_sig = TWAI0_TX_IDX,
.rx_sig = TWAI0_RX_IDX,
.bus_off_sig = TWAI0_BUS_OFF_ON_IDX,
.clk_out_sig = TWAI0_CLKOUT_IDX,
.stand_by_sig = TWAI0_STANDBY_IDX,
},
[1] = {
.irq_id = ETS_TWAI1_INTR_SOURCE,
.timer_irq_id = ETS_TWAI1_TIMER_INTR_SOURCE,
.tx_sig = TWAI1_TX_IDX,
.rx_sig = TWAI1_RX_IDX,
.bus_off_sig = TWAI1_BUS_OFF_ON_IDX,
.clk_out_sig = TWAI1_CLKOUT_IDX,
.stand_by_sig = TWAI1_STANDBY_IDX,
},
}
};