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150 Commits

Author SHA1 Message Date
morris
291554cd09 refactor(global): remove completed todos in the codebase 2025-12-15 22:40:15 +08:00
C.S.M
f405e51784 ci(esp32s31): Add ci build test for esp32s31 2025-12-11 15:17:15 +08:00
C.S.M
a90c93541c feat(esp32s31): Introduce new target esp32s31 2025-11-17 14:48:55 +08:00
Ashish Sharma
9fe50060e6 feat(mbedtls): update to version 3.6.5 2025-11-11 10:07:05 +08:00
Meet Patel
510a7f792e fix(esp_event): Updated minimum events dispatched test pass criteria 
For the dual core chips like ESP32H4 that are running on slow CPU
clock frequency (96MHz), the number of events getting dispatched in
the test case called "performance test - no dedicated task" were
falling short of expectation because of extra overhead with locks
etc when runing with a non dedicated task. Even for other chips like
ESP32S3, if the main CPU core is running at 80MHz, the result is same.
Hence, added a consideration for CPU clock frequency when deciding
pass criteria for this test case.
 2025-10-23 10:32:19 +05:30
Marius Vikhammer
503a9faa9f change(core): clean-up leftover todo items in code 2025-04-23 16:15:19 +08:00
Chen Jichang
6c4271d4bb feat(esp32h4): disable unsupported build 2025-03-28 14:41:29 +08:00
Chen Jichang
6f83f39dce feat(esp32h4): introduce target esp32h4(stage 1) 2025-02-08 17:07:44 +08:00
Marius Vikhammer
2ef05f9f9b test(idf_test): add performance target file for H21 2025-01-17 12:27:00 +08:00
Ondrej Kosta
b07db010ac ci(esp_eth): added ESP32P4 to iperf CI test 
Updated (increased) ETH_THROUGHPUT_SPI_ETH limits.
Improved iperf optimization description
 2025-01-07 12:41:54 +01:00
gaoxu
64bbb53b8f feat(esp32h21): introduce target esp32h21(stage 1) 2024-11-12 15:42:27 +08:00
gaoxu
efd04b7709 feat(adc): support ADC oneshot and continuous on C61 2024-11-08 17:13:26 +08:00
Konstantin Kondrashov
3081a4ea49 feat(esp_timer): Updates systimer and esp_timer 2024-09-12 14:26:37 +08:00
Marius Vikhammer
f9ed33857d ci(timer): increase IDF_PERFORMANCE_MAX_ESP_TIMER_GET_TIME_PER_CALL for C5/C61 2024-08-16 11:12:46 +08:00
gaoxu
65820c07ac feat(adc): support ADC oneshot and continuous mode on ESP32C5 and enable test 2024-07-13 14:03:23 +08:00
Marius Vikhammer
eb24a57728 feat(intr): basic interrupt/freertos support for C61 2024-06-12 09:25:47 +08:00
gaoxu
795f3fe377 feat(adc): support ADC continuous mode on ESP32P4 2024-06-03 16:50:39 +08:00
wuzhenghui
7408732688 fix(freertos): Updated threshold for scheduling time test for esp32p4 
This commit increases the pass threshold for the scheduling time test on
esp32p4.
 2024-03-27 16:19:19 +08:00
Bogdan Kolendovskyy
934f741361 test(examples/ethernet/iperf): Add default configurations for all supported PHYs 
Created default configurations to run iperf test on all supported phys and adpated test code appropriately
 2024-03-26 11:37:30 +01:00
Sudeep Mohanty
afee830278 change(freertos): Updated spinlock performance test threshold 
This commit relaxes the passing threshold for spinlock performance tests
for the esp32p4.
 2024-03-25 14:25:35 +01:00
Sudeep Mohanty
33dec4175a fix(freertos): Updated threshold for scheduling time test for esp32p4 
This commit increases the pass threshold for the scheduling time test on
esp32p4.
 2024-03-25 09:03:09 +01:00
wanlei
8625ed252e fix(spi): test_apps mv idf_perform_test to esp_driver_spi domain 2024-03-07 18:16:27 +08:00
wanlei
0cf11e5b87 feat(spi): add esp32c5 spi support 2024-03-07 18:11:48 +08:00
wanlei
ee02b71f1c feat(esp32c61): introduce target esp32c61 2024-03-01 21:12:25 +08:00
Sudeep Mohanty
e4f167df25 Merge branch 'fix/freertos_optimize_critical_sections' into 'master' 
fix(riscv): Updated RISC-V functions to set interrupt threshold for CLIC targets

Closes IDFCI-2033, IDFCI-2034, IDF-8090, and IDF-8117

See merge request espressif/esp-idf!29055
 2024-03-01 17:51:14 +08:00
gaoxu
f9109beda2 feat(uart): add HP/LP uart support on ESP32C5 2024-02-29 14:12:51 +08:00
Sudeep Mohanty
459ff8348f fix(riscv): Added RISC-V functions to set interrupt threshold for CLIC targets 
This commit added the RISC-V utility functions to set the interrupt
threshold for CLIC targets by using direct register value writes.
This makes the functions more efficient during run-time.
This is done to improve the critical section enter and exit performance on esp32p4.
 2024-02-28 08:51:37 +01:00
Konstantin Kondrashov
2b909f99d5 feat(esp_timer): Re-enable tests on ESP32P4 
esp_timer example test requires Light Sleep support.
 2024-01-30 13:39:23 +02:00
wanlei
2baee4fb0f refactor(spi_master): replace dma_ll in spi hal layer (part 2.1) 2023-12-28 19:58:54 +08:00
laokaiyao
bb0879b3f8 feat(esp32c5): introduce target esp32c5 2023-11-28 16:14:17 +08:00
Armando
faa6e51086 feat(sdio): sdio cross chip test app 2023-11-13 11:21:47 +08:00
gaoxu
0ea0b39725 feat(adc_cali): Add ADC calibration support for ESP32H2 2023-10-31 11:29:30 +08:00
wanlei
00fcdce725 feat(spi_master): p4 add master driver supported 2023-10-08 14:45:12 +08:00
gaoxu
d57c4cde44 ci(adc): increase adc performance test threshold on c6 2023-09-28 09:18:58 +00:00
laokaiyao
9811ff7be9 ci(adc): increase all adc performance test threshold on c6 2023-09-20 11:35:25 +08:00
laokaiyao
f781bf1c5c ci(adc): increase adc performance test threshold on c6 2023-09-18 10:22:11 +08:00
Armando
706d684418 feat(esp32p4): introduced new target esp32p4, supported hello_world 2023-08-09 19:33:25 +08:00
Armando
101e6a18eb esp32p4: introduce the target 
Add esp32p4 target to tools and Kconfig
Create directories and files that are essential for `idf.py --preview set-target esp32p4`
 2023-06-13 15:16:11 +08:00
laokaiyao
ffb40a89d9 adc_cali: supported channel compensation of adc calibration on esp32c6 2023-05-23 22:44:25 +08:00
laokaiyao
b16ed57b2e esp32h4: removed esp32h4 related files 2023-04-23 12:03:07 +00:00
Sachin Parekh
a485b1cb67 esp32h2: Add support for ECC hardware accelerator 2023-03-13 16:39:46 +05:30
wanlei
d8ac58b4d4 spi: add high freq test on different spi config 2023-02-27 11:27:57 +08:00
Armando
d0e4d36fb6 esp_adc: support h2 oneshot mode and continuous mode 2023-02-23 11:48:31 +08:00
Laukik Hase
45df5b56d5 esp32/mpi: Added alternate workaround for MPI data corruption issue 
- Use DPORT_WRITE_REG (volatile writes) wrappers to write to the
  MPI peripheral
- Updated the previous workaround added for the same issue as it
  was failing in some long runs and with `COMPILER_OPTIMIZATION_PERF`
  enabled.
- The test performance numbers had to be updated due to the
  performance penalty introduced by this fix.

Closes https://github.com/espressif/esp-idf/issues/10403
 2023-02-21 18:43:54 +05:30
Marius Vikhammer
f9c1a2b791 Merge branch 'feature/core_c6_component_tests' into 'master' 
ci: update idf-core related tests for C6

Closes IDF-6888

See merge request espressif/esp-idf!22282
 2023-02-14 16:47:52 +08:00
Armando
790be9390a esp_adc: increase c6 adc std thres 
c6, h2, hardware calibration not supported. Reading result varies.
 2023-02-14 10:18:34 +08:00
Marius Vikhammer
25abc7f6d8 ci: update idf-core related tests for C6 2023-02-13 13:01:57 +08:00
Armando
3afa671069 esp_adc: added adc digital filter feature 2023-02-10 16:46:20 +00:00
wanlei
5300bd3b2f spi: support H2 spi master, slave, slave_hd driver 2023-02-08 11:38:45 +08:00
wanlei
b20c156ae6 spi_master: update spi performance test resulte for C6 2023-01-18 10:41:43 +08:00