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94 Commits

Author SHA1 Message Date
C.S.M
63432d6f9b fix(esp32c5): Remove esp32c5 from bypass check test target list 2025-12-11 17:52:33 +08:00
igor.udot
8c233aa9bd ci: temp_skip_ci for p4 2025-12-04 18:08:33 +08:00
Song Ruo Jing
1862fdec74 refactor(gpio): split GPIO HAL into separate component 
cleaned up some includes in GPIO peripheral files
 2025-11-26 15:35:07 +08:00
Marius Vikhammer
cd0e6ec2ca fix(lp-core): fixed rtc mem conflict on p4 eco5 between app and ULP 2025-11-20 17:03:23 +08:00
armando
b25ba4a0c1 ci(p4): disable p4 rev3 invalid tests temporarily 2025-11-17 12:11:39 +08:00
laokaiyao
14cf724f64 refactor(touch): remove legacy touch driver dependency in ulp 2025-10-15 09:44:43 +08:00
Chen Chen
a4710cc206 refactor(driver): remove redundant driver dependencies 
now the driver component only contains legacy code for i2c, twai and
touch sensor
 2025-09-30 15:47:45 +08:00
Meet Patel
0f776d31ae Merge branch 'feature/ulp_riscv_pulse_counter_example' into 'master' 
feat(ulp_riscv): Add pulse counter example code for ulp riscv

Closes IDF-14106

See merge request espressif/esp-idf!42107
 2025-09-30 10:13:21 +05:30
Meet Patel
af895be8f6 feat(ulp_riscv): Add pulse counter example code for ulp riscv 
Added a pulse counter example code for ulp riscv chips. The example
works by HP core generating high frequency pulses on a GPIO, which
are counted by ULP core to find out the highest possible frequency
of pulses that can be achieved without missing any edges.
 2025-09-26 15:59:07 +05:30
Omar Chebib
324446da95 feat(mailbox): define and implement a mailbox API with hardware and software support 2025-09-25 10:25:15 +08:00
Marek Fiala
9d35d63651 feat(cmake): Update minimum cmake version to 3.22 (whole repository) 2025-08-19 14:44:32 +02:00
Marius Vikhammer
43667179f4 ci(system): enabled and cleanup misc system test-apps build-test-rules 2025-08-06 17:50:50 +08:00
Samuel Obuch
1a49af0fb6 feat(ulp): esp32c5 support in debugging example 2025-07-31 13:48:40 +02:00
wuzhenghui
879713d589 change(esp_hw_support): deprecate esp_sleep_get_wakeup_cause with esp_sleep_get_wakeup_causes 2025-06-27 16:18:10 +08:00
Marius Vikhammer
2fbbcc6d36 feat(ulp): updated to reflect eco2 ulp changes 2025-05-12 10:22:20 +08:00
jath03
954d12955d feat(ulp): LP Timer interrupt example 
This commit adds an example to demonstrate the use of the LP Timer
interrupt on the LP Core.
 2025-04-23 09:52:45 +02:00
morris
122d122c64 refactor(gpio): reuse gpio_int_type_t in the rtc io driver 2025-04-01 18:21:57 +08:00
laokaiyao
c9cc7bb216 feat(ulp_touch): add example for lp_touch 2025-03-14 21:56:05 +08:00
igor.udot
daf2d31008 test: format all test scripts 2025-03-05 12:08:48 +08:00
igor.udot
f742a05b28 feat: supports lp uart wakeup 2025-02-05 14:54:48 +08:00
Marius Vikhammer
c35f188efb fix(lp_io): allow edge wakeup types for LP-IO on chips which support it 2024-12-17 10:00:48 +08:00
Frantisek Hrbata
1c92945f59 change(examples): switch examples to use a minimal build 
Currently, several example dependencies rely on the fact that all
registered components are added to the build, along with components
specified in common requirements. This results in longer build times
because even unused components must be built. Switch all examples to use
idf_minimal_build to compile only the components actually required by
the example.

Signed-off-by: Frantisek Hrbata <frantisek.hrbata@espressif.com>
 2024-11-20 20:14:40 +01:00
Frantisek Hrbata
ad15109daa change(examples): explicitly specify component dependencies for examples 
Currently, several examples do not explicitly state their component
dependencies, relying instead on the default behavior that includes all
registered components and commonly required ones in the build.
Explicitly adding component dependencies can reduce build time when
set(COMPONENTS main) is used.

Signed-off-by: Frantisek Hrbata <frantisek.hrbata@espressif.com>
 2024-11-20 14:11:24 +01:00
Ivan Grokhotkov
68e9bcbf1e fix(build): clean up dependencies on driver component 2024-11-07 13:09:23 +01:00
Marius Vikhammer
402fecee17 Merge branch 'feature/lp_spi_example' into 'master' 
feat(lp_core): added lp-spi example for lp core

Closes IDF-10287

See merge request espressif/esp-idf!34521
 2024-11-06 10:58:19 +08:00
Marius Vikhammer
cfe6c45122 feat(lp_core): added lp-spi example for lp core 
Added an example of using lp-spi from lp-core to read sensor data
from a BME280 sensor.
 2024-11-05 08:18:09 +08:00
laokaiyao
c007ec5f17 feat(touch): update doc and example for touch version 2 2024-10-30 10:02:49 +08:00
Marius Vikhammer
b4c501374f feat(lp_core): added support for LP-IO as LP-core wakeup source 2024-10-16 09:34:20 +08:00
Liu Xiao Yu
e051b921b8 Merge branch 'feat/lp_spinlock' into 'master' 
feat(ulp): implement inter-hp-lp-cpu spinlock/critical section

Closes IDF-10206

See merge request espressif/esp-idf!32775
 2024-09-20 17:09:50 +08:00
Xiaoyu Liu
446528d40f feat(ulp): implement ulp lp core spinlock 2024-09-20 10:22:45 +08:00
Sudeep Mohanty
3c65f1b654 fix(lp_uart): Added lp_uart flush feature 
This commit adds the lp_core_uart_flush() API to flush the LP UART Tx
FIFO. This API is automatically called once the program returns from the
main function().

Closes https://github.com/espressif/esp-idf/issues/14530
 2024-09-19 09:36:04 +02:00
Sudeep Mohanty
0b75e75f2c feat(lp_adc): Added example to demonstrate LP ADC usage from LP Core 
This commit adds an example which demonstrates how to configure and use
the LP ADC from the LP core while the main core is in deep sleep.
 2024-09-10 08:45:11 +02:00
Alexey Gerenkov
625c437412 feat(ulp): Add LP core debugging support 2024-09-03 18:28:14 +03:00
Lou Tianhao
4393343ac9 fix(ci): some actions taken to pass ci 2024-08-29 14:15:41 +08:00
Lou Tianhao
47a0677525 feat(pm): support ext1_wakeup/esp_deep_sleep_enable_gpio_wakeup for esp32c5mp deepsleep 2024-08-28 10:44:08 +08:00
Xiaoyu Liu
1216dd1abd change(ulp): bu lp i2c on esp32c5 2024-08-01 14:48:31 +08:00
Marius Vikhammer
b6208df463 feat(lp-core): allow custom cmakefile project file for ULP project 2024-07-30 12:30:54 +08:00
Xiaoyu Liu
66f7731bd8 change(lp_uart): Enable SOC_ULP_LP_UART_SUPPORTED on ESP32C5 2024-07-08 16:10:39 +08:00
laokaiyao
cb22b8aaf7 ci(esp32c5): enable c5 target test 2024-07-02 16:45:49 +08:00
gaoxu
0d35631ec1 feat(rtcio): support RTCIO on ESP32C5 2024-06-28 22:01:55 +08:00
Sudeep Mohanty
38acdede57 docs(lp-core): Updated lp_core_uart app README files 
Updated the LP Core UART apps README files to mention the default pins
to use on esp32p4.
 2024-06-21 11:35:37 +02:00
Marius Vikhammer
aae3aa5e5f feat(lp-core): bringup lp-core for C5 MP 
LP-Core is now able to boot and run on C5 MP chip.
 2024-06-19 09:18:47 +08:00
Marius Vikhammer
13e5b6f335 Merge branch 'feature/lp_core_pcnt' into 'master' 
feat(ulp): add pulse counter example for lp core

Closes IDF-9137

See merge request espressif/esp-idf!31163
 2024-06-03 12:33:50 +08:00
Marius Vikhammer
7495f3bf28 feat(ulp): add pulse counter example for lp core 2024-05-30 14:30:00 +08:00
Marius Vikhammer
de77d04358 feat(ulp): add lp core panic handler 2024-05-28 14:42:59 +08:00
Marius Vikhammer
c5a513cf49 feat(ulp): support interrupts for C6/P4 LP core 
Closes https://github.com/espressif/esp-idf/issues/13059
 2024-04-28 17:03:23 +08:00
Marius Vikhammer
1fa59c442b fix(ulp): fixed lp-core not booting during sleep 
LP core was unable to boot when system was in deepsleep.
This was due to lp uart init in LP rom using XTAL as clk source,
which is normally powered down during sleep.

This would cause lp uart to get stuck while printing ROM output,
and the app would never boot.

Also fixed wrong wakeup cause used by HP core for ULP wake up
 2024-04-18 11:36:30 +08:00
Sudeep Mohanty
bc74cf808d feat(ulp-riscv): Added Kconfig option to enable ULP RISC-V interrupts 
This commit adds a Kconfig option, CONFIG_ULP_RISCV_INTERRUPT_ENABLE, to
enable interrupts on the ULP RISC-V core on the esp32s2 and esp32s3.
 2024-02-21 11:45:06 +01:00
Sudeep Mohanty
82f2294bcb Merge branch 'feature/ulp_riscv_interrupt_handling' into 'master' 
feat(ulp-riscv): Added interrupt handling for ULP RISC-V

Closes IDFGH-9866 and IDF-1713

See merge request espressif/esp-idf!27802
 2024-01-19 15:44:27 +08:00
Sudeep Mohanty
4230acb971 feat(ulp-riscv): Added new example to demonstrate ULP RISC-V interrupts 
This commit adds a new example which demonstrates how the ULP RISC-V
co-processor handles interrupts.
 2024-01-18 15:59:49 +01:00