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45,405 Commits 21 Branches 168 Tags
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Commit Graph

89 Commits

Author SHA1 Message Date
armando
432791f756 change(mmu): remove paddr remap warning log 2025-06-25 17:37:44 +08:00
morris
fb4b590941 refactor(dma)!: remove deprecated functions 2025-06-12 12:24:58 +08:00
armando
10d4e71323 feat(mmu): use cache freeze for mmap apis 2025-06-11 10:27:55 +08:00
Laukik Hase
12e2df2d74 feat(esp_tee): Support for ESP32-H2 - the rest of the components 2025-05-20 16:31:23 +05:30
nilesh.kale
944e3ec846 fix(esp_mm): Move cache-related sources out of pure RAM app check 
This change resolves build issues when compiling with
CONFIG_APP_BUILD_TYPE_PURE_RAM_APP enabled.
 2025-04-29 12:30:27 +05:30
armando
1abe57c987 test(system): increased 200B memory leak thresh due to mmu mmap mutex 
200B to extend the thresh, real increase to the memory usage will be smaller
 2025-04-14 10:45:40 +08:00
armando
6abf6f5196 test(mmu): added esp_mmu_map concurrency test 2025-04-14 10:45:40 +08:00
armando
5a1cb71184 fix(mmu): fixed esp_mmu_map concurrent issue and add related docs 2025-04-14 10:45:40 +08:00
armando
46be72437b fix(cache): fixed l2 cache suspended/frozen but l1cache triggers l2 writeback issue 2025-04-02 18:03:43 +08:00
Chen Jichang
c34b4eb882 feat(esp32h4): enable ESP32H4 ci build 2025-03-28 14:41:28 +08:00
Chen Jichang
45ba78940f feat(esp32h4): finnal introduce hello world 2025-03-19 18:48:41 +08:00
igor.udot
daf2d31008 test: format all test scripts 2025-03-05 12:08:48 +08:00
Armando
fd09700aab test(mmu): added test for checking esp_mmu_vaddr_to_paddr with psram vaddrs 2025-02-17 16:15:09 +08:00
Armando
299d8115ed fix(mmu): fixed esp_mmu_vaddr_to_paddr cannot figure out psram vaddr issue on esp32p4 2025-02-17 16:15:09 +08:00
Chen Ji Chang
9342b3fba1 Merge branch 'feat/h4_introduce_step1_add_target' into 'master' 
feat(esp32h4): introduce target esp32h4(stage 1)

See merge request espressif/esp-idf!36780
 2025-02-11 18:11:08 +08:00
morris
88e3ea2ea5 Merge branch 'bugfix/cache_invalidate_should_respect_size' into 'master' 
bugfix(cache): cache invalidate operation should respect the cache line size

See merge request espressif/esp-idf!36805
 2025-02-11 11:47:22 +08:00
morris
5558028870 bugfix(cache): cache invalidate operation should respect the cache line size 
not only the buffer address but also the buffer size should aligned to
the cache line size
 2025-02-10 17:48:46 +08:00
Armando
462c9f2510 test(mmu): test can find paddr caps by any paddr offset 2025-02-10 17:12:51 +08:00
Armando
cdaf777b22 feat(mmu): supported find paddr caps by any paddr offset 
Closes https://github.com/espressif/esp-idf/issues/14988
 2025-02-10 15:07:47 +08:00
Chen Jichang
6f83f39dce feat(esp32h4): introduce target esp32h4(stage 1) 2025-02-08 17:07:44 +08:00
gaoxu
5ef4f20778 feat(esp32h21): disable unsupported build test 2025-02-06 15:47:51 +08:00
Song Ruo Jing
20eb6ca5e9 feat(heap): add a MALLOC_CAP_SIMD flag 
MALLOC_CAP_SIMD can be used to allocate memory to be used for SIMD instructions
 2025-01-16 14:39:12 +08:00
morris
c8d4e1b094 Merge branch 'feature/bitscrambler_support' into 'master' 
feature(driver): BitScrambler loopback support

See merge request espressif/esp-idf!31236
 2025-01-03 16:08:52 +08:00
gaoxu
25731d0c1e feat(esp32h21): finnal introduce hello world support 2024-12-30 20:14:40 +08:00
Jeroen Domburg
a88e719e33 feat(driver): BitScrambler support 
This adds an assembler for the BitScrambler assembly language,
plus unit tests for it. It also adds the loopback driver,
which can do BitScrambler operations on memory-to-memory
transfers. Documentation is also included.
 2024-12-30 09:39:23 +08:00
Laukik Hase
733741bbac feat(esp_tee): Support for ESP-TEE - esp_system component 2024-12-02 12:20:04 +05:30
gaoxu
64bbb53b8f feat(esp32h21): introduce target esp32h21(stage 1) 2024-11-12 15:42:27 +08:00
Alexey Gerenkov
391dd7b9ad fix(build): Fix declaration of linker labels for ROM reserved regions 
It looks like as a part of optimization for inlined functions like 'mmu_ll_vaddr_to_laddr' Clang aligns constant value
used for bitwise AND operation with the pointer to external symbol passed to the function as parameter.
That led to assertion failures because boundaries can be unaligned to 4 bytes.
 2024-09-18 21:40:39 +03:00
Marius Vikhammer
0d140f38ea fix(system): fixed warnings related to ununsed var if asserts disabled 2024-08-26 10:25:04 +08:00
C.S.M
7c08d417d2 fix(mmu_map): make a static function force inline in order not be put in flash 2024-08-02 15:51:22 +08:00
Armando
67b8dbb5e5 feat(cache): supported cache on c61 2024-08-01 09:34:18 +08:00
Armando (Dou Yiwen)
23ee0b65ff Merge branch 'feat/cache_msync_c2m_sliced_ops' into 'master' 
cache: supported msync c2m sliced ops

Closes IDF-10510 and IDF-10414

See merge request espressif/esp-idf!32155
 2024-07-29 11:37:24 +08:00
Armando
074ed08251 change(cache): added mutex to guarantee the atomicity 
This mutex is only added when msync is called from the task. This means only one task will compete with the msync-calls from ISRs.
 2024-07-25 14:25:19 +08:00
Armando
3bfc134a23 feat(cache): supported msync c2m sliced ops 
This commit adds sliced C2M ops, when the msync is called in task. This way it gives a breath of the critical section, so that a long C2M operation will not disable interrupts for a long time
 2024-07-25 14:25:19 +08:00
wanlei
3cf069c7d8 feat(esp32c61): disable unsupported build test 2024-07-16 16:06:19 +08:00
Mahavir Jain
f5349ca342 fix(esp_mm): for existing mmap region, consider new offset for virtual addr 
While returning virtual address for existing memory mapped region, newly
supplied offset from the physical address was not getting considered.

This was a regression present from ESP-IDF 5.1 release.

Added test case in spi_flash component that fails without this fix.

Closes https://github.com/espressif/esp-idf/issues/13929
 2024-07-10 15:54:36 +05:30
Alexey Lapshin
ed6e497c6f feat(build): add COMPILER_STATIC_ANALYZER option 2024-06-18 14:25:37 +08:00
Alexey Lapshin
505647292d fix(esp_mm): fix warnings found by GNU static analyzer 2024-06-18 14:25:37 +08:00
Jeroen Domburg
a1ba660b4a change(system): heap_caps_alloc returns aligned memory if caps indicate a need for it 
The implicit promise of heap_alloc_caps() and friends is that the memory it
returns is fit for the purpose as requested in the caps field. Before
this commit, that did not happen; e.g. DMA-capable memory wass returned
from a correct region, but not aligned/sized to something the DMA subsystem
can handle.

This commit adds an API to the esp_mm component that is then used by the
heap component to adjust allocation alignment, caps and size dependent on
the hardware requirement of the requested allocation caps.
 2024-05-27 12:41:18 +08:00
Armando
10d3912c70 feat(xip_psram): support xip psram feature on esp32p4 2024-05-22 15:56:07 +08:00
Armando
e36a396801 change(test): test changes for esp cache malloc 2024-04-15 15:34:51 +08:00
Armando
0df418facd change(cache): update to use heap cap malloc flags 2024-04-15 15:34:51 +08:00
Armando
b658c712e7 change(cache): change esp_cache_aligned_alloc_log_e_to_w 2024-04-15 09:49:25 +08:00
laokaiyao
65b1fd33d3 ci(esp32c5mp): disable the unsupported tests 2024-04-07 12:13:29 +08:00
Armando
f0518b3c16 feat(dma): advanced dma malloc helper 2024-04-02 14:30:14 +08:00
wanlei
20c18ac52b feat(esp32c61): final introduce helloworld support 2024-04-02 10:50:52 +08:00
Armando
be5af1c737 test(cache): added test for cache_prefer_m/calloc 2024-03-26 18:03:15 +08:00
Armando
de70ed1c84 feat(cache): added cache_prefer_m/calloc 2024-03-26 18:03:15 +08:00
Armando
905b427479 test(cache): added test for M2C with ESP_CACHE_MSYNC_FLAG_UNALIGNED 2024-03-22 15:38:50 +08:00
Armando
9e36994a7b bugfix(cache): don't allow M2C direction ESP_CACHE_MSYNC_FLAG_UNALIGNED 2024-03-22 15:38:50 +08:00