4 Commits

Author	SHA1	Message	Date
fuzhibo	f6d96f33bb	bugfix: add .rodata section for riscv ulp for esp32s2	2021-05-07 10:56:33 +10:00
Angus Gratton	997c07c2ee	esp32s2 riscv ulp: Ensure reset vector is always at offset 0x0 ... Previous linker script relied on nothing else using the .text section As reported at https://esp32.com/viewtopic.php?f=2&t=20734&p=75997	2021-05-07 10:54:55 +10:00
Angus Gratton	66fb5a29bb	Whitespace: Automated whitespace fixes (large commit) ... Apply the pre-commit hook whitespace fixes to all files in the repo. (Line endings, blank lines at end of file, trailing whitespace)	2020-11-11 07:36:35 +00:00
Felipe Neves	b6dba84323	ulp: added support to building code for riscv ULP coprocessor	2020-07-15 15:28:49 -03:00