6 Commits

Author	SHA1	Message	Date
C.S.M	bc80476411	fix(mspi): Refactor mspi ll/soc for c5 and c61	2024-08-15 15:08:56 +08:00
Cao Sen Miao	2e83fa1c69	refactor(spi_flash): Use new spi_flash register sturct and deperecate the old one	2024-01-08 09:59:22 +08:00
Cao Sen Miao	c147a6d022	fix(spi_flash): Fix spi_flash write fail on 26M C2(including OTA fail on this chip)	2023-09-07 17:30:15 +08:00
Cao Sen Miao	ed96dadd06	spi_flash: 2nd stage for supporting flash suspend. (1). Support more esp chips (2). Improve real-time performance (3). Making timing more stable (4) Add documents	2023-05-11 20:10:30 +08:00
Cao Sen Miao	4418a855ba	spi_flash: refactor the spi_flash clock configuration, and add support for esp32c2	2022-04-26 15:22:37 +08:00
laokaiyao	cf049e15ed	esp8684: rename target to esp32c2	2022-01-19 11:08:57 +08:00