Updated S3 to use PMS protection for writing to flash through cache. This means we get
a panic quicker for this illegal behavior than we did before, making the source of the error
easier to track down.
Previously, we included symbols from soc/usb_dwc_cfg.h and configured
the HAL and LL according to it. Now we get the configuration in runtime
from USB-DWC registers.
Added missing definition for USB FS peripheral on ESP32-P4.
support line mode 1-2-4-8 depend on targets.
fix sct mode dma descriptor counter compute issue.
add conf_bits_len setting API to control interval time.
fix(esp_phy): Allow "Enable USB when phy init" option only on supported targets
Closes IDFGH-10996 and IDFGH-11554
See merge request espressif/esp-idf!27364
- modify console example to use the new SOC_LIGHT_SLEEP_SUPPORTED
and SOC_DEEP_SLEEP_SUPPORTED macros when registering sleep commands
- remove exclusion of esp32p4 in basic and advanced example in
.build-test-rules.yml
- replace exclusion of esp32p4 for deep and light sleep tests with newly introduced macro
- remove the temporary disable check for esp32p4 and uses the
SOC_LIGHT_SLEEP_SUPPORTED maccro instead.
"Enable USB when phy init" Kconfig option would call esp_phy function
`phy_bbpll_en_usb()` that is not implemented for all targets.
Selecting this option for unsupported target results in linking error.
The necessity of this workaround is now defined soc_caps.h rather than
in the Kconfig.
Closes https://github.com/espressif/esp-idf/issues/12185
Increase LP_UART_EMPTY_THRESH_DEFAULT value to 4. The original value
could cause the FIFO become empty before filling next data into the FIFO
when the buadrate is high. TX_DONE interrupt would raise before actual
transmission complete in such case.
This header has been removed for the following reasons:
- Header is misplaced. 'xxx_types.h' headers should be placed in the 'hal'
component.
- The 'usb_xxx_endpoint_t' should be placed in the 'xxx_struct.h' header.
usb_pins.h and usb_periph.h/c lists mappings of USB DWC signals to GPIOs used
to connect to external FSLS PHYs. However, those signals can be routed to any
GPIOs via the GPIO matrix. Thus, these mapping are meaningless and have been
deprecated.
