10 Commits

Author	SHA1	Message	Date
Chen Jichang	546b60f6f1	fix(parlio): fix non-free running test case	2025-03-07 19:44:23 +08:00
Chen Jichang	f3eec647aa	feat(parlio_tx): backport the clock change to v5.3	2025-02-28 15:03:11 +08:00
Chen Jichang	25f35910a7	fix(parlio): fix rempty interrupt during resetting fifo ... Move the fifo reset to after disabling the tx core clock. And add external non-free running clock src test.	2025-02-27 15:12:33 +08:00
Chen Jichang	1ff5e64acd	fix(parlio_tx): add clock and fifo reset in disable function	2025-02-26 18:41:49 +08:00
laokaiyao	9b4e9e7c7a	ci(parlio_rx): increase the i2s test case stability	2024-11-01 11:06:12 +08:00
laokaiyao	ea3f4ad6f0	ci(parlio_rx): bypass the spi test case	2024-11-01 11:06:12 +08:00
laokaiyao	3fc2c00dab	fix(parlio): fix cache sync issue on P4	2024-07-30 19:46:35 +08:00
morris	8ae12473b5	refactor(i2s): clean up DMA buffer allocation	2024-06-12 10:16:24 +08:00
laokaiyao	dcc7cf9379	feat(parlio_rx): support parlio rx on p4	2024-05-27 17:20:15 +08:00
laokaiyao	baccc61482	refactor(parlio): make parlio driver as component	2024-01-04 14:12:42 +08:00