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31 Commits

Author SHA1 Message Date
morris
03a2fca29d Merge branch 'feature/flash_software_resume_v5.3' into 'release/v5.3' 
feat(spi_flash): Add config for adding auto check status after suspend to improve performance (backport v5.3)

See merge request espressif/esp-idf!36526
 2025-02-20 11:01:11 +08:00
Mahavir Jain
e1a023e13d Merge branch 'feat/support_aes_pseudo_round_func_in_esp32h2_eco5_v5.3' into 'release/v5.3' 
Support AES and XTS-AES's pseudo round function in ESP32H2-ECO5 (v5.3)

See merge request espressif/esp-idf!36464
 2025-01-24 14:40:00 +08:00
morris
8f20eac2df Merge branch 'feat/spi_std_timing_and_bit_trans_v5.3' into 'release/v5.3' 
feat(driver_spi): support adjust master rx to standard timing (v5.3)

See merge request espressif/esp-idf!36400
 2025-01-24 10:24:14 +08:00
harshal.patil
ac0dc0d775 feat(bootloader_support): Permanently enable XTS-AES pseudo rounds when FE release mode is enabled 2025-01-23 14:06:16 +05:30
C.S.M
4b86e6424b fix(spi_flash): Fix issue that bit_length is wrong on suspend chip because not judge idle correctly 2025-01-21 17:39:39 +08:00
Jiang Jiang Jian
731c461049 Merge branch 'bugfix/pm-300-v5.3' into 'release/v5.3' 
backport v5.3: fix some esp32c5 and esp32c61 light sleep wakeup issues

See merge request espressif/esp-idf!36076
 2025-01-21 16:47:44 +08:00
C.S.M
d756e6d208 feat(spi_flash): Add config for adding auto check status after suspend to improve performance 2025-01-21 15:04:21 +08:00
Jiang Jiang Jian
4e0cb9a140 Merge branch 'fix/fix_p4_deepsleep_io_leakage_v5.3' into 'release/v5.3' 
fix(esp_hw_support): fix esp32p4 JTAG pad deepsleep current leakage (v5.3)

See merge request espressif/esp-idf!36009
 2025-01-17 12:10:46 +08:00
wanckl
e1cc1e2568 feat(driver_spi): support using SPI_DEVICE_STD_TIMING to adjust master rx in standard timing 2025-01-17 10:48:52 +08:00
Li Shuai
f453380760 fix(uart): fix esp32c61 light sleep uart wakeup failed 2025-01-16 20:34:31 +08:00
wuzhenghui
a18fe20e9b fix(esp_hw_support): fix esp32p4 JTAG pad deepsleep current leakage 2024-12-26 16:05:14 +08:00
Song Ruo Jing
340c0d1280 fix(uart): fix 8/16-bit uart register access 2024-12-25 19:08:05 +08:00
morris
bde65f22fc fix(gpio): improve set level performance 
by avoid "read-modify-write" operation. The registers designed to be
write only.

Related to https://github.com/espressif/esp-idf/issues/14674
 2024-11-14 14:35:49 +08:00
morris
7e7f388392 change(wdt): create wdt_periph.c in soc component 2024-08-09 18:12:25 +08:00
morris
21147cd7f5 Merge branch 'feat/gpspi_flash_support_v5.3' into 'release/v5.3' 
fix(spi_flash): Add external flash support on esp32c6,esp32h2,esp32p4(backport v5.3)

See merge request espressif/esp-idf!32522
 2024-08-05 17:13:53 +08:00
C.S.M
5b8da6f327 fix(spi_flash): Add external flash support on esp32c6,esp32h2,esp32p4 2024-08-05 11:47:55 +08:00
Song Ruo Jing
8b8bb72ad4 feat(uart): support uart module sleep retention on c6/h2/p4 2024-07-31 15:15:11 +08:00
Konstantin Kondrashov
14d93dea75 feat(soc): Update efuse related soc_caps for c61 and c5 (MP/beta3) 2024-06-20 12:23:05 +08:00
Michael (XIAO Xufeng)
dbf8726b47 Merge branch 'feat/esp32p4_xip_psram_v5.3' into 'release/v5.3' 
psram: support xip_psram on esp32p4 (v5.3)

See merge request espressif/esp-idf!31044
 2024-06-11 21:07:41 +08:00
Jiang Jiang Jian
9230a25140 Merge branch 'bugfix/fix_lp_half_world_access_v5.3' into 'release/v5.3' 
fix(hal): fix LP timer / PMU LL half word access (v5.3)

See merge request espressif/esp-idf!31386
 2024-06-11 10:44:34 +08:00
wuzhenghui
6a86351373 fix(hal): fix PMU LL half word and byte access 2024-06-07 14:13:40 +08:00
Jeroen Domburg
df4195062d change(system): heap_caps_alloc returns aligned memory if caps indicate a need for it 
The implicit promise of heap_alloc_caps() and friends is that the memory it
returns is fit for the purpose as requested in the caps field. Before
this commit, that did not happen; e.g. DMA-capable memory wass returned
from a correct region, but not aligned/sized to something the DMA subsystem
can handle.

This commit adds an API to the esp_mm component that is then used by the
heap component to adjust allocation alignment, caps and size dependent on
the hardware requirement of the requested allocation caps.
 2024-05-30 16:02:03 +08:00
Armando
48e06fafea feat(xip_psram): support xip psram feature on esp32p4 2024-05-29 10:02:44 +08:00
Konstantin Kondrashov
06c28f0ee9 feat(hal): Adds hal funcs for cpu.c 2024-04-11 13:07:04 +03:00
morris
e8b6d2280d change(gptimer): use private unsafe RCC LL functions in bootloader 2024-04-08 17:48:20 +08:00
wanlei
20c18ac52b feat(esp32c61): final introduce helloworld support 2024-04-02 10:50:52 +08:00
wuzhenghui
4a64d2fe2c change(hal): control PAU bus clock by hal layer 2024-03-29 00:36:46 +08:00
wanlei
535afdd7f4 feat(esp32c61): ci enable header check, fix c61 build 2024-03-27 19:39:59 +08:00
Konstantin Kondrashov
25bc10e143 feat(efuse): Update efuses for C5 and C61 2024-03-21 18:37:46 +02:00
wanlei
37dfd8fb52 feat(esp32c61): add G0 component support 2024-03-18 14:28:27 +08:00
wanlei
ee02b71f1c feat(esp32c61): introduce target esp32c61 2024-03-01 21:12:25 +08:00