Commit Graph

516 Commits

Author SHA1 Message Date
morris
67c6ae91ab Merge branch 'feat/allow_setting_rmt_group_prescale_v5.3' into 'release/v5.3'
refactor(rmt): set group clock prescale dynamically (v5.3)

See merge request espressif/esp-idf!36738
2025-02-26 17:03:16 +08:00
Chen Jichang
e98ded4e7b refactor(rmt): set group clock prescale dynamically
Closes https://github.com/espressif/esp-idf/issues/14760
2025-02-26 11:22:51 +08:00
Martin Vychodil
2c26a7e11e fix(security): Fixed ESP32S2 memory protection check for Peri1 RTCSLOW interrupt
- fixes the issue found in https://github.com/espressif/esp-idf/issues/15359
- extends debug printouts in the related tests
2025-02-21 16:29:04 +08:00
wuzhenghui
1f6d8d4e5d fix(esp_hw_support): fix esp32s2/esp32s3 RTC IOMUX clock management 2025-02-20 19:39:02 +08:00
morris
03a2fca29d Merge branch 'feature/flash_software_resume_v5.3' into 'release/v5.3'
feat(spi_flash): Add config for adding auto check status after suspend to improve performance (backport v5.3)

See merge request espressif/esp-idf!36526
2025-02-20 11:01:11 +08:00
Tomas Rezucha
56620eb23b fix(usb/host): Set SCHED_INFO for all channels
Although the hardware documentation suggests that SCHED_INFO is only used
for periodic channels, empirical evidence shows that omitting this configuration
on non-periodic channels can cause them to freeze.
Therefore, we set this field for all channels to ensure reliable operation.
2025-02-06 08:18:04 +01:00
Mahavir Jain
e1a023e13d Merge branch 'feat/support_aes_pseudo_round_func_in_esp32h2_eco5_v5.3' into 'release/v5.3'
Support AES and XTS-AES's pseudo round function in ESP32H2-ECO5 (v5.3)

See merge request espressif/esp-idf!36464
2025-01-24 14:40:00 +08:00
morris
8f20eac2df Merge branch 'feat/spi_std_timing_and_bit_trans_v5.3' into 'release/v5.3'
feat(driver_spi): support adjust master rx to standard timing (v5.3)

See merge request espressif/esp-idf!36400
2025-01-24 10:24:14 +08:00
harshal.patil
ac0dc0d775 feat(bootloader_support): Permanently enable XTS-AES pseudo rounds when FE release mode is enabled 2025-01-23 14:06:16 +05:30
C.S.M
d756e6d208 feat(spi_flash): Add config for adding auto check status after suspend to improve performance 2025-01-21 15:04:21 +08:00
Jiang Jiang Jian
4e0cb9a140 Merge branch 'fix/fix_p4_deepsleep_io_leakage_v5.3' into 'release/v5.3'
fix(esp_hw_support): fix esp32p4 JTAG pad deepsleep current leakage (v5.3)

See merge request espressif/esp-idf!36009
2025-01-17 12:10:46 +08:00
wanckl
e1cc1e2568 feat(driver_spi): support using SPI_DEVICE_STD_TIMING to adjust master rx in standard timing 2025-01-17 10:48:52 +08:00
Tomas Rezucha
47fd8aac23 feat(hal/usb): Explicitly enable clock and reset USB WRAP on init 2025-01-16 16:39:59 +08:00
Tomas Rezucha
875defd3b7 fix(usb/host): Fix reaction on High-Speed NYET packet
In Scatter-Gather DMA mode, the USB-DWC will automatically enable
PING protocol if an OUT packet is NACKed by the High-Speed device.
The PING bit must be manually reset.
2025-01-08 16:29:14 +08:00
wuzhenghui
a18fe20e9b fix(esp_hw_support): fix esp32p4 JTAG pad deepsleep current leakage 2024-12-26 16:05:14 +08:00
Tomas Rezucha
177679b74e feat(hal/usb): Make USB-DWC HAL&LL configuration independent
Previously, we included symbols from soc/usb_dwc_cfg.h and configured
the HAL and LL according to it. Now we get the configuration in runtime
from USB-DWC registers.

Added missing definition for USB FS peripheral on ESP32-P4.
2024-11-22 17:32:22 +08:00
Tomas Rezucha
1d5a8f6952 feat(hal/usb): Add USB UTMI PHY HAL
* Add a bare-bones HAL API for the USB UTMI PHY
* Split USB-DWC LL per target
2024-11-22 17:32:22 +08:00
morris
bde65f22fc fix(gpio): improve set level performance
by avoid "read-modify-write" operation. The registers designed to be
write only.

Related to https://github.com/espressif/esp-idf/issues/14674
2024-11-14 14:35:49 +08:00
laokaiyao
e1e9ffdd4f fix(i2s): fix i2s half sample rate issue 2024-10-24 14:32:06 +08:00
C.S.M
403bd86a21 fix(i2c): Fix the wrong return value of esp32,esp32s2,esp32s3 2024-09-12 11:21:10 +08:00
C.S.M
189db78bec fix(i2c): Fix possible error state in clear the bus,
Closes https://github.com/espressif/esp-idf/issues/13647
2024-09-12 11:21:08 +08:00
morris
7e7f388392 change(wdt): create wdt_periph.c in soc component 2024-08-09 18:12:25 +08:00
Song Ruo Jing
8b8bb72ad4 feat(uart): support uart module sleep retention on c6/h2/p4 2024-07-31 15:15:11 +08:00
Jiang Jiang Jian
86bcea64b9 Merge branch 'feature/touch_driver_ng_on_p4_v5.3' into 'release/v5.3'
feat(touch_sensor): touch driver ng on p4 (v5.3)

See merge request espressif/esp-idf!31624
2024-07-26 11:42:27 +08:00
morris
25f78b3715 fix(rmt): power up memory block 2024-07-18 14:52:15 +08:00
laokaiyao
8a18ae60e0 feat(touch_sens): touch sensor driver-ng on P4 2024-07-13 15:47:20 +08:00
gaoxu
a326f15120 feat(adc): support ADC continuous mode on ESP32P4 2024-06-12 18:34:04 +08:00
gaoxu
e63d6582cc feat(adc): move adc periph enable/reset functions to ll layer 2024-06-12 18:16:45 +08:00
gaoxu
3f5037866b fix(dma): feat(adc): support ADC oneshot mod on ESP32P4 2024-06-12 18:16:41 +08:00
Armando
48e06fafea feat(xip_psram): support xip psram feature on esp32p4 2024-05-29 10:02:44 +08:00
wuzhenghui
309725fcd0 feat(esp_hw_support): support esp32p4 clock output 2024-04-17 15:09:49 +08:00
wuzhenghui
101f1abbf1 refactor(esp_hw_support): add hal layer for clock output feature 2024-04-17 14:25:29 +08:00
Konstantin Kondrashov
06c28f0ee9 feat(hal): Adds hal funcs for cpu.c 2024-04-11 13:07:04 +03:00
morris
e8b6d2280d change(gptimer): use private unsafe RCC LL functions in bootloader 2024-04-08 17:48:20 +08:00
Darian Leung
023eae4f0b feat(hal/usb): Update USB WRAP and USJ LL, add missing ESP32-P4 LL
This commit updates updates the LLs of USB WRAP and USJ as follows:

- Added missing 'usb_wrap_ll.h' and 'usb_serial_jtag_ll.h' for the ESP32-P4
- Added LL cap macros to distinguish feature differences between the LLs of
  different targets:
    - '..._LL_EXT_PHY_SUPPORTED' indicates whether the USB WRAP/USJ supports
      routing to an external FSLS PHY.
    - '..._LL_SWAP_PHY_SUPPORTED' indicates whether the USB WRAP/USJ supports
      swapping between multiple internal FSLS PHYs.
- Tidied up some RCC LL functions and their callers.
- Added 'usb_wrap_types.h' and 'usb_serial_jtag_types.h' to provide types used
  in LLs.
- Fixed some spelling/naming issues as part of code-spell pre-commit
2024-04-04 02:47:00 +08:00
morris
b4de983dbc feat(dedic_gpio): add reset and clock control functions 2024-03-29 10:41:17 +08:00
Harshal Patil
5274bf88e4 Merge branch 'esp32p4/add_sha_support' into 'master'
feat: add SHA support for ESP32-P4

Closes IDF-7541 and IDF-7882

See merge request espressif/esp-idf!24865
2024-03-27 20:08:28 +08:00
harshal.patil
9cd10e196b feat(hal/sha): use RCC atomic block to enable/reset the SHA peripheral 2024-03-27 11:23:30 +05:30
Cao Sen Miao
ede1df51b0 feat(i2c_master): Add parameter to config I2C scl await time 2024-03-27 10:35:11 +08:00
Wan Lei
cfcdacaaac Merge branch 'feature/spi_dma_segmented_configure_transfer' into 'master'
feat(spi_master): new feature dma controlled segmented configure transfer(sct) mode (part_1)

Closes IDF-4998

See merge request espressif/esp-idf!22684
2024-03-21 18:50:03 +08:00
Cao Sen Miao
c0e5f2b73a fix(i2c_master): Fix issue that i2c clock got wrong after reset,
Closes https://github.com/espressif/esp-idf/issues/13397
2024-03-21 13:13:53 +08:00
wanlei
51ffd40843 feat(spi_master): rebase dma sct mode support, rename APIs, use malloc conf_buffer 2024-03-20 16:06:43 +08:00
wanlei
1e6c61daa6 spi_master: sct mode support set line mode, transaction interval time
support line mode 1-2-4-8 depend on targets.
fix sct mode dma descriptor counter compute issue.
add conf_bits_len setting API to control interval time.
2024-03-20 15:42:03 +08:00
Armando
b303e4b7a6 spi_master: new segmented-configure-transfer mode 2024-03-20 15:42:03 +08:00
Darian
53e3833f44 Merge branch 'refactor/usb_fsls_phy_hal' into 'master'
refactor(hal/usb): Update USB PHY related HAL/LL API

See merge request espressif/esp-idf!29659
2024-03-20 06:07:29 +08:00
Darian Leung
6d40e191f8 refactor(hal/usb): Refactor usb_wrap_ll.h
This commit rewrite the 'usb_wrap_ll.h' API as follows:

- All APIs renamed from 'usb_fsls_phy_ll_...()' to 'usb_wrap_ll_...()'
- APIs now match their equivalent counter parts in 'usb_serial_jtag_ll.h'
2024-03-18 19:23:44 +08:00
Darian Leung
a77e5cc718 refactor(hal/usb): Remove usb_fsls_phy_ll.h
For targets that only contain a USJ peripheral (and not a DWC OTG), their
'usb_fsls_phy_ll.h' headers only contain a single function
('usb_fsls_phy_ll_int_jtag_enable()') whose feature is already covered by
functions in 'usb_serial_jtag_ll.h'. Thus, this header is redundant.

This commit does the following:

- Remove 'usb_fsls_phy_ll.h' for targets that only contain a USJ peripheral
- Rename 'usb_fsls_phy_[hal|ll].[h|c]' to `usb_wrap_[hal|ll].[h|c]` for targets
that contain a DWC OTG peripheral. This better reflects the underlying peripheral
that the LL header accesses.
2024-03-18 19:23:43 +08:00
Song Ruo Jing
90bf2772ac fix(uart): Fix mismatch wakeup rising edges required with the threshold configured
Closes https://github.com/espressif/esp-idf/issues/12586
2024-03-15 16:58:33 +08:00
Mahavir Jain
cd47cf46dc Merge branch 'esp32p4/add_aes_support' into 'master'
feat: add AES support for ESP32-P4

Closes IDF-6519

See merge request espressif/esp-idf!26429
2024-03-15 11:43:22 +08:00
harshal.patil
e8268d8b6b feat(hal/aes): use RCC atomic block to enable/reset the AES peripheral 2024-03-13 15:22:07 +05:30