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2e9838be97fe661d75c062b1abcf1a17643eb701
Commit Graph

123 Commits

Author SHA1 Message Date
wuzhenghui
2e9838be97 change(esp_hw_support): wait pll calibration done in regdma link instead of wait fixed value 2025-02-17 20:51:03 +08:00
wuzhenghui
a6de0b8446 fix(esp_hw_support): fix modem power enable failed after modem state wakeup 2025-01-09 11:11:48 +08:00
Michael (XIAO Xufeng)
fd3da18412 Merge branch 'bugfix/warn_rc32k_use_in_kconfig_v5.1' into 'release/v5.1' 
fix(clk): add an inevitable kconfig option to be selected to use rc32k (v5.1)

See merge request espressif/esp-idf!35967
 2025-01-07 15:19:10 +08:00
Song Ruo Jing
9026c0905e fix(clk): add an inevitable kconfig option to be selected to use rc32k 2024-12-25 20:08:56 +08:00
Song Ruo Jing
6a26acf647 fix(clk): rtc_clk_cpu_freq_set_xtal will always disable CPU's PLL 
Align C6/H2 rtc_clk_cpu_freq_set_xtal behavior to other chips
 2024-12-24 22:33:38 +08:00
Jiang Jiang Jian
aacc60deee Merge branch 'feature/set_hp_sleep_power_mode_with_clock_src_selection_v5.1' into 'release/v5.1' 
change(esp_hw_support): switch hp_sys default power mode with clock src selection (v5.1)

See merge request espressif/esp-idf!34114
 2024-11-12 19:26:55 +08:00
wuzhenghui
590335963c fix(esp_hw_support): enable all supported slow clock at pmu_init 2024-10-28 11:36:55 +08:00
wuzhenghui
fdc6a04943 change(esp_hw_support): switch hp_sys default power mode with clock src selection 2024-10-11 16:08:44 +08:00
Xiao Xufeng
dbed93dce8 fix(startup): move rtc initialization before MSPI timing tuning to improve stability 2024-09-18 19:30:22 +08:00
Song Ruo Jing
a4bc0becb0 fix(clk): warn the users to avoid using RC32K clock 2024-09-13 12:03:03 +08:00
wuzhenghui
242d0e70e7 fix(esp_hw_support): wait eFuse controller idle after sleep wakeup 2024-07-08 14:17:28 +08:00
Jiang Jiang Jian
e649fcf81c Merge branch 'feature/esp32c6_pu8m_in_sleep_support_v5.1' into 'release/v5.1' 
feat(sleep): support 8m force pu in sleep for esp32c6 & esp32h2 (v5.1)

See merge request espressif/esp-idf!31001
 2024-06-26 10:40:32 +08:00
wuzhenghui
8e5e95e452 change(esp_hw_support): update xtal_freq after assume to avoid mass print in DFS 2024-06-24 13:38:47 +08:00
Omar Chebib
16d957e7aa fix(esp_hw_support): clear reserved interrupts that are not applicable for each target 2024-06-03 11:09:45 +08:00
Omar Chebib
1439815d57 refactor(esp_hw_support): changed reserved interrupt functions to be now defined per SoC 2024-06-03 11:05:25 +08:00
chaijie@espressif.com
d2dd830a47 feat(sleep): support 8m force pu in sleep for esp32c6/esp32h2 2024-05-22 11:35:12 +08:00
Li Shuai
08a05ec562 change(esp_hw_support): use new retention api to implement gdma retention 2024-05-14 19:34:37 +08:00
Jiang Jiang Jian
a8f833a912 Merge branch 'fix/fix_pmu_power_domain_initialize_order_v5.1' into 'release/v5.1' 
fix(esp_hw_support): fix pmu power domain initialize order (v5.1)

See merge request espressif/esp-idf!30152
 2024-04-10 17:23:55 +08:00
wuzhenghui
ddd2c5b418 fix(esp_hw_support): fix pmu power domain initialize order 2024-04-10 10:07:58 +08:00
Laukik Hase
f839fa089a fix(esp_hw_support): Fix the flash I/DROM region PMP protection 2024-04-03 15:51:39 +05:30
hongshuqing
d50b336afd fix: fix_maximum_value_of_config_rtc_clk_cal_cycle_bug 2024-03-14 16:12:17 +08:00
Mahavir Jain
590c650fc0 Merge branch 'fix/pmp_idcache_reg_prot_v5.1' into 'release/v5.1' 
fix(esp_hw_support): Fix the I/DCACHE region PMP protection (v5.1)

See merge request espressif/esp-idf!29357
 2024-03-08 22:50:10 +08:00
Jiang Jiang Jian
44fa82c7c3 Merge branch 'feature/support_gdma_retention_v5.1' into 'release/v5.1' 
feature: support gdma retention in pd_top lightsleep (v5.1)

See merge request espressif/esp-idf!29089
 2024-03-05 10:59:30 +08:00
Laukik Hase
5fcd908d26 refactor(esp_hw_support): Remove redundant PMP entry for ROM region 
- The ROM text and data sections share the address range
    (see SOC_I/DROM_MASK_LOW - SOC_I/DROM_MASK_HIGH).
  - Initially, we had two PMP entries for this address range - one marking the
    region as RX and the other as R.
  - However, the latter entry is redundant as the former locks the PMP settings.
  - We can divide the ROM region into text and data sections later when we
    define boundaries marking these regions from the ROM.
 2024-03-01 10:25:25 +05:30
Laukik Hase
5173ba1777 fix(esp_hw_support): Fix the I/DCACHE region PMP protection 2024-03-01 10:25:25 +05:30
Aditya Patwardhan
55c5c8367b Merge branch 'bugfix/soc_cpu_subsys_region_v5.1' into 'release/v5.1' 
fix(soc): change debug addr range to CPU subsystem range (v5.1)

See merge request espressif/esp-idf!28672
 2024-02-28 11:16:48 +08:00
Jiang Jiang Jian
76152c80a2 Merge branch 'c6_auto_dbias_master_hsq_v5.1' into 'release/v5.1' 
ESP32C6: Active & sleep dbg and dbias get from efuse to fix the voltage (v5.1)

See merge request espressif/esp-idf!28722
 2024-02-28 10:49:13 +08:00
wuzhenghui
40a869935b feat(esp_hw_support): support gdma register context sleep retention 
Closes https://github.com/espressif/esp-idf/issues/12528
 2024-02-23 18:30:17 +08:00
hongshuqing
80378b809e feat(pmu): set fix voltage to different mode for esp32c6 2024-02-22 15:01:14 +08:00
Jakob Hasse
a66234b6de fix(esp_hw_support): Removed unused include directories from cmake 
* Closes https://github.com/espressif/esp-idf/issues/12700
 2024-02-21 11:41:11 +08:00
Mahavir Jain
614ad494f6 fix(soc): change debug addr range to CPU subsystem range 
For C6/H2/P4/C5, there is no SoC specific debug range. Instead the same
address range is part of CPU Subsystem range which contains debug mode
specific code and interrupt config registers (CLINT, PLIC etc.).

For now the PMP entry is provided with RWX permission for both machine
and user mode but we can save this entry and allow the access to only
machine mode for this range.

For P4/C5 case, this PMP entry can have RW permission as the debug mode
specific code is not present in this memory range.
 2024-01-24 12:52:27 +05:30
Jiang Jiang Jian
aa2793f3f1 Merge branch 'feature/support_hw_trigger_regdma_when_pu_top_v5.1' into 'release/v5.1' 
fix(pm): trigger regdma retention by PMU when TOP is not power down on esp32H2 (backport v5.1)

See merge request espressif/esp-idf!28342
 2024-01-18 11:06:51 +08:00
Lou Tianhao
2ecbfecedf feat(pm): support PMU trigger regdma when PU TOP 2024-01-16 14:01:22 +08:00
Xiao Xufeng
a055fcbda4 fix(rtc): fixed bbpll not calibrated from bootloader issue 2024-01-05 10:19:20 +08:00
chaijie@espressif.com
630a8ff709 fix(bbpll): fix bbpll calibration may stop early bug(ESP32C2/S3/C6/H2) 2024-01-05 03:24:20 +08:00
wuzhenghui
c33dd0f4a2 fix(esp_hw_support/sleep): wait flash ready after non-pd_top lightsleep for esp32c6 2023-12-27 15:36:15 +08:00
wuzhenghui
5dac3d9e03 fix(esp_hw_support/sleep): fix rtc_time_us_to_slowclk div zero in deepsleep process 
Closes https://github.com/espressif/esp-idf/issues/12695
 2023-12-11 09:24:07 +00:00
wuzhenghui
61bb3fb67f fix(esp_hw_support): clear all type ULP wakeup intr status at ulp wakeup source enable 2023-11-16 11:49:40 +08:00
Jiang Jiang Jian
cee24a6ce1 Merge branch 'bringup/support_callback_mechanism_in_lightsleep_flow_v5.1' into 'release/v5.1' 
feat(pm): support callback mechanism in lightsleep flow(backport v5.1)

See merge request espressif/esp-idf!26365
 2023-11-14 15:33:19 +08:00
Lou Tianhao
925da11115 feat(PowerManagement/lightsleep): Support ESP_SLEEP_EVENT_CALLBACKS 2023-11-02 11:05:38 +00:00
Li Shuai
9d97513147 change(Power Management): the xpd_xtal32k value depends on system slow clock source config option when pmu initialize 2023-10-24 17:15:10 +08:00
zlq
17c2931309 feat(bootloader): adjust dbias of bootloader, change clock of H2 to 64 
MHz
 2023-10-16 14:35:45 +08:00
Xiao Xufeng
81dcc61008 Revert "feat(volt): chip auto adjust volt for esp32c6 & esp32h2" 
This reverts commit b221f87e00.
 2023-10-16 14:35:41 +08:00
wuzhenghui
49013a0560 feat(modem_clock): separate management of modem_adc_common_fe clock and modem_private_fe 2023-09-28 16:24:39 +00:00
gaoxu
b183b88463 fix(adc): power settings not taking into effect on C6 2023-09-28 16:24:39 +00:00
zlq
7bbe19d92f feat(volt): chip auto adjust volt for esp32c6 & esp32h2 2023-09-27 06:39:59 +00:00
Jiang Jiang Jian
cba086c3a8 Merge branch 'bugfix/fix_sleep_risk_vol_param_to_v5.1' into 'release/v5.1' 
fix(sleep): fix inproper sleep vol param for esp32c6 & esp32h2 (v5.1)

See merge request espressif/esp-idf!26074
 2023-09-27 14:36:10 +08:00
harshal.patil
f6b589e275 feat(esp_hw_support): Added locking mechanism for the ECDSA and ECC peripheral 2023-09-25 14:33:04 +05:30
chaijie@espressif.com
80f7e913a0 fix(sleep): fix inproper sleep vol param for esp32c6 & esp32h2 2023-09-25 16:39:46 +08:00
wuzhenghui
aaf04f514f fix(esp_hw_support): manage i2c_ana_mst clock witch modem clock driver 2023-08-04 12:04:40 +08:00