Commit Graph

25 Commits

Author SHA1 Message Date
C.S.M
7be3141195 fix(i2c): Fix the i2c sda/scl force out register value on some esp chips 2024-09-12 11:21:10 +08:00
C.S.M
189db78bec fix(i2c): Fix possible error state in clear the bus,
Closes https://github.com/espressif/esp-idf/issues/13647
2024-09-12 11:21:08 +08:00
C.S.M
deb91c7abe fix(i2c_master): Fix an I2C issue that slave streth happen but master timeout set seems doesn't work
Closes https://github.com/espressif/esp-idf/issues/14129
Closes https://github.com/espressif/esp-idf/issues/14401
2024-09-12 11:20:46 +08:00
Cao Sen Miao
ede1df51b0 feat(i2c_master): Add parameter to config I2C scl await time 2024-03-27 10:35:11 +08:00
Cao Sen Miao
cf521b60ea feat(i2c): Support i2c sleep retention on esp32c6/h2 2024-02-23 11:28:14 +08:00
Cao Sen Miao
62a0efdd7c feat(i2c): Add pure hal i2c master driver example 2024-01-31 11:47:14 +08:00
C.S.M
59d029bf66 Merge branch 'feat/i2c_rcc_support' into 'master'
refactor(i2c): Add reset and clock control to i2c ll layer

See merge request espressif/esp-idf!26684
2023-10-28 10:01:06 +08:00
Cao Sen Miao
0bf1dce413 refactor(i2c): Add reset and clock control to i2c ll layer 2023-10-27 10:50:35 +08:00
morris
418494800c fix(i2c): read write FIFO memory by volatile 2023-10-26 14:40:07 +08:00
Cao Sen Miao
8d639492f2 feat(i2c_slave): Add new implementation and API for I2C slave 2023-10-24 18:44:49 +08:00
Planck (Lu Zeyu)
255d499884 fix(ll): fix cpp compile error
Merges https://github.com/espressif/esp-idf/pull/12093

fix(ll): remove FLAG_ATTR macro

Such kind of operator overload will not work because C++ thinks such overload is ambiguous and it still prefer the built-in one which accepts and returns integer. Manually force type conversion seems to be unavoidable.
2023-09-14 14:48:12 +08:00
Cao Sen Miao
4ef94fc0dc feat(i2c): Add new API and implementation for I2C driver 2023-08-10 11:55:54 +08:00
Cao Sen Miao
8882ba2ba1 CI: Move all UT in driver to test_app 2023-04-25 10:40:32 +08:00
Omar Chebib
a0f8434f93 i2c: fix a bug in sda sample timing
* Closes https://github.com/espressif/esp-idf/issues/9777

This bug prevented SCL line to work properly after a NACK was received in master mode.
2023-04-13 14:37:44 +08:00
laokaiyao
330149f3a6 i2c: support i2c on esp32h2 2023-02-01 11:23:11 +08:00
laokaiyao
8677216576 esp32h2: renaming esp32h2 to esp32h4 2022-11-08 17:05:33 +08:00
Cao Sen Miao
803fc3fbe0 I2C: Add i2c support for ESP32C6 2022-11-07 14:12:53 +08:00
Cao Sen Miao
31b88a4c88 I2C: Refactor i2c hal and ll 2022-09-01 15:53:59 +08:00
Cao Sen Miao
53580a62b5 I2C: Fullfill the I2C clock tree, and support 26M XTAL on ESP32-C2 2022-07-19 11:41:42 +08:00
Cao Sen Miao
e218723e0e I2C: Make I2C clock frequency accurate 2022-07-06 11:58:08 +08:00
Omar Chebib
477bc9e64c I2C: Fix SCL period timings on ESP targets
The output frequency is now more accurate as the SCL period timings have been fixed.
This fix applies for ESP32, ESP32S3, ESP32C3, ESP32C2 and ESP32H2
2022-05-18 05:36:08 +00:00
laokaiyao
cf353c505a i2c: support esp32h2 2022-02-23 15:19:37 +08:00
laokaiyao
f21020ce04 esp32h2: update reg and struct for beta2 2021-11-24 12:34:17 +08:00
SalimTerryLi
874a720286 soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
update all struct headers to be more "standardized":

- bit fields are properly wrapped with struct
- bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits
- bit field should be uint32_t
- typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199

added helper macros to force peripheral registers being accessed in 32 bitwidth

added a check script into ci
2021-08-30 13:50:58 +08:00
Shu Chen
983cca8b27 esp32h2: copy driver/hal/soc components from esp32c3
Copy the esp32c3 code without any change:
 * components/driver/esp32h2
 * components/esp32h2
 * components/hal/esp32h2
 * components/soc/esp32h2
2021-07-01 19:53:11 +08:00