The existing spinlock mechanism possibly has an overlap of memory
operations during multi core execution, as visible in CI testing. When
running the example inter_cpu_critical_section, shared count increment
stops at 299999 instead of reaching 300000, but this only happens
randomly 1 out of 10 times. It is suspected that a memory operation
happens simultaneously from both core, even though spinlock protection
is in place.
To handle this problem, a memory barrier (fence instruction) is added
at critical places during spinlock acquire and release, to ensure that
all memory operations upto that point are completed and synchronised
before proceeding further.
feat(hal): graduate rtc_cntl_timer/lp_timer hal/ll into a new component: esp_hal_rtc_timer and unify naming
Closes IDF-15045
See merge request espressif/esp-idf!44573
This is a follow up commit on top of below commit:
c061c781a3
This commit further increases the ADC_TEST_LOW_VAL threshold from 2165
to 2200, because some tests were found to be failing with ADC reading
values such as 2171, 2172, 2182 etc. Suspecting the ADC callibration or
surrounding temperature to cause such fluctuations which need higher
threshold to avoid test failures.
The low power ADC in ESP32P4 sometimes reads the data value as 2160,
2161 or a bit greater than that when running the CI test case named
esp32p4.defaults.test_lp_core -> LP ADC 1 raw read stress test. However,
the test only passes if value stays below the LOW_VAL threshold of 2160.
Hence, updated the LOW_VAL threshold to 2165 keeping some margin,
because ADC readings may differ slightly from board to board, so this
type of small variations in ADC values are expected.
lp_core_i2c.h header file has sda and scl pins hardcoded to GPIO6 and
GPIO7 which works only for ESP32C6. ESP32C5 uses GPIO2 and GPIO3 for
I2C SDA and SCL. Hence, added LP_I2C_SCL_IO and LP_I2C_SDA_IO macros
under conditional compilation in library header file, so there is no
need to hardcode I2C GPIO pins and any other test apps or examples
that are including the LP I2C header file can also use Macro directly.
Updated the i2c read/write APIs ulp_riscv_i2c_master_read_from_device
and ulp_riscv_i2c_master_write_to_device in ulp_riscv component to
return error codes back to the application
Closes https://github.com/espressif/esp-idf/issues/15904
Moved the error logs outside critical section for i2c communication errors
like READ fail, WRITE fail etc. in the ulp_riscv_i2c component
Also changed the error log API from ESP_EARLY_LOG to ESP_LOG, so we can support
tag based filtering and enabling/disabling of logs
Closes https://github.com/espressif/esp-idf/issues/17425
