Commit Graph

17 Commits

Author SHA1 Message Date
Song Ruo Jing
7f2b85b82b feat(clk): add basic clock support for esp32p4
- Support CPU frequency 360MHz
- Support SOC ROOT clock source switch
- Support LP SLOW clock source switch
- Support clock calibration
2023-12-29 00:37:26 +08:00
TD-er
90eada6993 fix(spi): Correct REG_SPI_BASE(i) macro for all targets
The existing formula can never match these registers.

Closes https://github.com/espressif/esp-idf/pull/12559
Closes https://github.com/espressif/esp-idf/pull/12562
2023-11-17 02:39:28 +00:00
wuzhenghui
842ff10777 fix(soc): fix wrong freq definition for 26Mhz version esp32c2 soc 2023-07-15 01:54:48 +08:00
wuzhenghui
2b600df4ee fix(esp_pm): Constrains the minimum frequency of APB_MAX when the modem is working 2023-07-14 20:10:16 +08:00
Alexey Lapshin
4df3ff619e feat(esp_system): implement hw stack guard for riscv chips
- add hardware stack guard based on assist-debug module
- enable hardware stack guard by default
- disable hardware stack guard for freertos ci.release test
- refactor rtos_int_enter/rtos_int_exit to change SP register inside them
- fix panic_reason.h header for RISC-V
- update docs to include information about the new feature
2023-07-01 16:27:40 +00:00
Song Ruo Jing
2c2a62e323 clk_tree: Add basic clock support for esp32h2
- Support SOC ROOT clock source switch
- Support CPU frequency change
- Support RTC SLOW clock source switch
- Support RTC SLOW clock + RC FAST calibration

Remove FPGA build for esp32h2
2023-02-20 17:15:02 +08:00
Song Ruo Jing
b72d759290 uart: Add support for esp32h2 2023-02-06 00:48:04 +08:00
Ivan Grokhotkov
0dcdd39db1 soc: fix some memory region boundaries for esp32c3, esp32c2, esp32h4 2023-01-09 07:33:37 +00:00
Omar Chebib
53c7dd4efc WDT: implement interrupt wdt and task wdt for ESP32-C2
ESP32-C2 has a single group timer, thus it will use it for the interrupt watchdog,
which is more critical than the task watchdog. The latter is implement in
software thanks to the `esp_timer`component.
2022-09-15 14:37:59 +08:00
wuzhenghui
7cb9304b65 Clean IRAM and DRAM address space conversion macros 2022-07-29 17:07:39 +08:00
wuzhenghui
31183270fb bugfix: fix SOC_ROM_STACK_START defines 2022-07-29 10:51:47 +08:00
wuzhenghui
21a4eda4d4 Use the entire sharedbuffer space as the heap of the D/IRAM attribute 2022-07-29 10:51:47 +08:00
songruojing
b3d8db3ae2 bootloader, esp_system: esp32c2 console uart to support 26MHz xtal
Gets the XTAL frequency from the RTC storage register, remove UART_CLK_FREQ_ROM macro from soc.h
2022-07-11 12:24:58 +08:00
Ivan Grokhotkov
2e37218ce5 soc, hal: remove XTAL_CLK_FREQ
XTAL_CLK_FREQ now depends on the actual XTAL used, remove this macro
and get the XTAL frequency from the RTC register instead.
No uses of XTAL_CLK_FREQ found, other than in the UART LL.
2022-07-11 12:24:58 +08:00
Ivan Grokhotkov
3973db7664 soc: make register access macros compatible with C++20
In C++20, using the result of an assignment to a 'volatile' value is
deprecated.

Breaking change: register "setter" or modification macros can no
longer be used as expressions.

Closes https://github.com/espressif/esp-idf/issues/9170
2022-06-17 18:09:22 +02:00
jiangguangming
0265a86361 soc: update memory address for esp32c2 2022-02-15 15:14:42 +08:00
laokaiyao
cf049e15ed esp8684: rename target to esp32c2 2022-01-19 11:08:57 +08:00