8 Commits

Author	SHA1	Message	Date
Armando	2d3736fa11	change(sdmmc): update the volatile location of the sdmmc_struct.h	2023-10-18 11:57:55 +00:00
Armando	70314b56d5	feat(sdmmc): supported sd2.0 on esp32p4	2023-10-18 11:57:55 +00:00
Ivan Grokhotkov	e9badf51c7	sdmmc: I/O phase adjustments ... 1. Fix incorrect meaning of SDMMC.clock bits, synchronize the names with the TRM. 2. Choose input and output phases to satisfy typical timing requirements. 3. Move use_hold_reg setting into the host driver, since it is related to timing. Closes https://github.com/espressif/esp-idf/issues/8521 Related to https://github.com/espressif/esp-idf/issues/8257	2023-04-14 18:18:54 +08:00
Omar Chebib	cd21058097	C/Cxx: unify static assertions with the macro ESP_STATIC_ASSERT ... Closes https://github.com/espressif/esp-idf/issues/9938	2022-11-21 16:18:08 +08:00
SalimTerryLi	874a720286	soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one ... update all struct headers to be more "standardized": - bit fields are properly wrapped with struct - bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits - bit field should be uint32_t - typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199 added helper macros to force peripheral registers being accessed in 32 bitwidth added a check script into ci	2021-08-30 13:50:58 +08:00
Cao Sen Miao	11672dc9e5	soc: update the csv headers for esp32s3	2021-06-16 18:04:18 +08:00
Ivan Grokhotkov	17c65dad27	soc: add esp32s3 sdmmc support ... * sync the latest struct header file from ESP32 * add soc_caps.h macros to distinguish between IO MUX and GPIO Matrix support in SDMMC on different chips. * store GPIO matrix signal numbers in sdmmc_slot_info_t	2021-05-10 23:21:27 +02:00
Renz Bagaporo	79887fdc6c	soc: descriptive part occupy whole component	2020-10-28 07:21:29 +08:00