Commit Graph

14 Commits

Author SHA1 Message Date
wuzhenghui
5436d1f0c4 fix(esp_system): force enable uart0 sclk in esp_restart 2025-06-27 20:04:13 +08:00
Konstantin Kondrashov
ff0408c087 feat(esp_system): Adds Kconfigs to place code in IRAM 2025-06-23 13:23:33 +03:00
Mahavir Jain
55a2ad3df3 fix(esp_system): reset crypto peripherals before device restart
This change addresses a rare but critical issue observed on certain
ESP32-C3 and ESP32-S3 devices, where secure boot verification
intermittently fails due to improper cleanup of crypto peripherals
during a restart.

Background – Restart Behavior in IDF
------------------------------------
In ESP-IDF, when the device restarts (via `esp_restart()` or due to a
panic/exception), a partial peripheral reset is performed followed by a
CPU reset. However, until now, crypto-related peripherals were not
included in this selective reset sequence.

Problem Scenario
----------------
If a restart occurs while the application is in the middle of a bignum
operation (i.e., using the MPI/Bignum peripheral), the ROM code may
encounter an inconsistent peripheral state during the subsequent boot.
This leads to transient RSA-PSS secure boot verification failures.

Following such a failure, the ROM typically triggers a full-chip reset
via the watchdog timer (WDT). This full reset clears the crypto
peripheral state, allowing secure boot verification to succeed on the
next boot.

Risk with Aggressive Revocation
-------------------------------
If secure boot aggressive revocation is enabled (disabled by default in
IDF), this transient verification failure could mistakenly lead to
revocation of the secure boot digest.

If your product configuration has aggressive revocation enabled,
applying this fix is strongly recommended.

Frequency of Occurrence
-----------------------
The issue is rare and only occurs in corner cases involving
simultaneous use of the MPI peripheral and an immediate CPU reset.

Fix
---
This fix ensures that all crypto peripherals are explicitly reset prior
to any software-triggered restart (including panic scenarios),
guaranteeing a clean peripheral state for the next boot and preventing
incorrect secure boot behavior.
2025-04-15 19:06:26 +05:30
Alexey Lapshin
7498f4655a fix(esp_system): fix GCC 14 analyzer warnings 2024-09-08 13:53:52 +07:00
Cao Sen Miao
6768805d20 fix(uart,usj...): Fix wrong serial number that has been parsed to rom functions,
Closes https://github.com/espressif/esp-idf/issues/12958
2024-01-18 10:51:51 +08:00
wuzhenghui
04fcfff5e0 fix(esp_system): fix uart clock disabled in driver cause esp_restart stuck 2023-11-27 12:06:07 +08:00
morris
083d9e7c0f mcpwm: reset peripheral in restart, panic and halt
mcpwm is commonly used in power eletronic area, when restart happens,
make sure the mcpwm generator is not working.

closes https://github.com/espressif/esp-idf/issues/11324
2023-05-06 15:58:58 +08:00
Song Ruo Jing
1a66459b44 usb_serial_jtag: Improve the code for the issue of usb cdc device unable to work during sleep
1. Remove RTC_CLOCK_BBPLL_POWER_ON_WITH_USB Kconfig option
   During sleep, BBPLL clock always gets disabled
   esp_restart does not disable BBPLL clock, so that first stage bootloader log can be printed
2. Add a new Kconfig option PM_NO_AUTO_LS_ON_USJ_CONNECTED
   When this option is selected, IDF will constantly monitor USB CDC port connection status.
   As long as it gets connected to a HOST, automatic light-sleep will not happen.

Closes https://github.com/espressif/esp-idf/issues/8507
2023-02-27 12:10:49 +08:00
wuzhenghui
0afeac9951 bugfix: reset modem lpcon in soft reset 2023-02-13 17:04:35 +08:00
Li Shuai
3ce896429c periph clock: implemented the modem module enable, disable and reset for esp32c6 2022-12-27 21:31:59 +08:00
wuzhenghui
5822cdf93b esp_phy: enable for esp32c6 2022-12-16 15:47:56 +08:00
Cao Sen Miao
d9f01ed43c spi_flash: bringup for esp32c6 2022-11-09 12:50:46 +08:00
Song Ruo Jing
1eb9a24a48 esp_system: Minor update for esp32c6 2022-09-26 20:32:13 +08:00
wuzhenghui
ab09c07fdd esp32c6: add esp_system support 2022-09-06 09:13:20 +00:00