C.S.M
6ad49c1146
refactor(spi_flash): Remove sdkconfig dependency in flash hal layer
2025-07-28 18:16:19 +08:00
morris
ccd092d7dc
refactor(hal): clean up some hal file dependency on sdkconfig.h
2025-07-17 10:33:08 +08:00
C.S.M
b194636859
feat(spi_flash): Add spi flash suspend support on esp32c5, esp32c61
2025-06-06 15:03:41 +08:00
wanckl
8994f8fe70
feat(spi_flash): add support gpspi ext_flash
2025-04-03 11:27:13 +08:00
armando
cbcee1625f
refactor(flash): rename SOC_SPI_MEM_SUPPORT_OPI_MODE to SOC_SPI_MEM_SUPPORT_FLASH_OPI_MOD
2025-03-19 14:01:22 +08:00
C.S.M
81426057b5
feat(spi_flash): Add config for adding auto check status after suspend to improve performance
2024-12-18 14:55:25 +08:00
Armando
35a74630dc
change(flash): add fdummy rin update
2024-11-28 14:53:20 +08:00
C.S.M
c9d481c6d2
feat(spi_flash): support software resume after suspend in unicore
2024-11-22 13:48:45 +08:00
wanckl
473f39c31f
fix(driver_spi): move macro GPIO_MATRIX_DELAY_NS out from soc.h
2024-09-03 13:55:00 +08:00
Cao Sen Miao
dcff5220a7
feat(spi_flash): Support configurable tSUS in flash suspend
2023-11-06 18:04:43 +08:00
Omar Chebib
a8b1475fe7
feat(riscv): implement coprocessors save area and FPU support
...
This commit mainly targets the ESP32-P4. It adds supports for coprocessors on
RISC-V based targets. The coprocessor save area, describing the used coprocessors
is stored at the end of the stack of each task (highest address) whereas each
coprocessor save area is allocated at the beginning of the task (lowest address).
The context of each coprocessor is saved lazily, by the task that want to use it.
2023-10-23 11:10:28 +08:00
Cao Sen Miao
ed96dadd06
spi_flash: 2nd stage for supporting flash suspend. (1). Support more esp chips (2). Improve real-time performance (3). Making timing more stable (4) Add documents
2023-05-11 20:10:30 +08:00
Armando
8eec6558d1
mspi: refactor timing tuning driver to make it compatible with p4
2023-05-04 17:05:35 +08:00
Cao Sen Miao
d9f01ed43c
spi_flash: bringup for esp32c6
2022-11-09 12:50:46 +08:00
wuzhenghui
1d299a8976
esp32c6: add hal support
2022-09-01 12:37:51 +08:00
Omar Chebib
5bcd9b2db8
G0: RISC-V targets have now an independent G0 layer
...
G0 doesn't depend on any G1+ layer for RISC-V based targets
2022-06-14 15:00:53 +08:00
Cao Sen Miao
4418a855ba
spi_flash: refactor the spi_flash clock configuration, and add support for esp32c2
2022-04-26 15:22:37 +08:00
Omar Chebib
f772d78317
hal: Remove dependency on log component
...
hal component (G0) doesn't depend on log component (G1) anymore in G0-only applications.
2022-04-18 10:35:01 +08:00
Armando
a8a47a61f5
spi_flash: move buffer check from hal layer to driver layer
...
Prior to this change, `spi_flash_hal_supports_direct_write` and
`spi_flash_hal_supports_direct_read` will check the buffer pointer
place, which should be done in driver layer, instead of HAL layer.
2022-04-08 11:46:10 +08:00
Cao Sen Miao
6c0aebe279
esp_flash: add opi flash support in esp_flash chip driver, for MXIC
2021-09-07 14:44:40 +08:00
morris
9afdf54748
hal: added HAL_ASSERT
2021-06-22 11:28:01 +08:00
Cao Sen Miao
08f1bbe0c7
spi_flash: fix cs line setup to make the flash driver more stable
2021-06-01 16:41:41 +08:00
Armando
9b9ea71ff9
spi: remove HSPI macro on esp32c3 and esp32s3
2021-04-06 13:42:49 +08:00
Cao Sen Miao
9905da46e0
spi_flash: Add auto suspend mode on esp32c3
2021-01-25 11:14:02 +08:00
KonstantinKondrashov
1f37a5f162
spi_flash(esp32-s2): Add the workaround of a reboot issue when SPI HW suspend is enabled
2021-01-25 11:13:38 +08:00
Angus Gratton
7c08be5771
hal: Add initial ESP32-C3 support
...
From internal commit 7761d6e8
2020-11-30 15:23:15 +11:00
Michael (XIAO Xufeng)
ee40f02afc
esp_flash: use divider rather than hard-coded freq in init code
2020-11-10 19:09:17 +08:00
Michael (XIAO Xufeng)
3bacf35310
esp_flash: support high capacity flash chips (32-bit address)
2020-10-29 18:20:11 +08:00
Michael (XIAO Xufeng)
647dea9395
soc: combine xxx_caps.h into one soc_caps.h
...
During HAL layer refactoring and new chip bringup, we have several
caps.h for each part, to reduce the conflicts to minimum. But this is
The capabilities headers will be relataive stable once completely
written (maybe after the featues are supported by drivers).
Now ESP32 and ESP32-S2 drivers are relative stable, making it a good
time to combine all these caps.h into one soc_caps.h
This cleanup also move HAL config and pin config into separated files,
to make the responsibilities of these headers more clear. This is
helpful for the stabilities of soc_caps.h because we want to make it
public some day.
2020-10-17 16:10:15 +08:00
Cao Sen Miao
4ce8b59016
spi_flash: fix initialization failure when ex_flash with psram on
...
non-SPI1 bus.
Close https://github.com/espressif/esp-idf/issues/4379
2020-09-25 10:22:24 +08:00
Michael (XIAO Xufeng)
5425ef4ee4
hal: extract hal component from soc component
2020-09-01 13:25:32 +08:00
