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7b921c71b3dd656fa47f9dd6eb5960f37ef58ddf
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1025 Commits

Author SHA1 Message Date
Zhou Xiao
7b921c71b3 change(ble): [AUTO_MR] Update lib_esp32c5 to 499c41fb 2025-07-28 14:09:17 +08:00
Zhou Xiao
ee48ef2167 change(ble): [AUTO_MR] Update lib_esp32h2 to 499c41fb 2025-07-28 14:09:17 +08:00
chenjianhua
f20c6a2813 fix(bt): Update bt lib for ESP32(d9a3de0) 
- Support BLE vendor HCI related params reset
- Support multi conn optimization vendor hci command
- Fixed the issue where rssi of conn is incorrect when latency is no zero
- Fixed prio setting for BLE events
- Fixed disconnection issue when coexisting with other BLE events
- Fixed crash due to bandwidth full when updating conn params
 2025-07-22 16:14:27 +08:00
Zhou Xiao
3671d7b59b feat(ble): support ble log uart dma out for ESP32-C5 2025-07-17 10:48:22 +08:00
Zhou Xiao
d45778f784 feat(ble): support ble log uart dma out for ESP32-H2 2025-07-17 10:48:22 +08:00
Zhou Xiao
ae8a7c8117 feat(ble): support ble log uart dma out for ESP32-C6 2025-07-17 10:48:22 +08:00
cjin
3d93ce37da feat(ble): enable broker initialization on ESP32-C6 2025-07-09 11:25:23 +08:00
cjin
afee51e0ef feat(ble): enable broker initialization on ESP32-C5 2025-07-09 11:25:23 +08:00
cjin
64f216ae5a feat(ble): enable broker initialization on ESP32-H2 2025-07-09 11:25:23 +08:00
cjin
265a8746dc feat(ble): support memory allocation check debug feature on ESP32-H2 2025-07-09 11:25:23 +08:00
cjin
027766e0c2 feat(ble): support memory allocation check debug feature on ESP32-C6 2025-07-09 11:25:23 +08:00
cjin
1ce54a5fe8 feat(ble): support memory allocation check debug feature on ESP32-C5 2025-07-09 11:25:23 +08:00
cjin
7ef90d4113 feat(ble): support memory allocation check debug feature on ESP32-C2 2025-07-09 11:25:23 +08:00
Zhou Xiao
3d45e8578e change(ble): [AUTO_MR] Update lib_esp32c2 to c7732d48 2025-07-09 11:17:37 +08:00
Zhou Xiao
1e236a1feb change(ble): [AUTO_MR] Update lib_esp32c6 to ca6c20bc 2025-07-09 11:17:37 +08:00
Zhou Xiao
91e8ed2a10 change(ble): [AUTO_MR] Update lib_esp32c5 to ca6c20bc 2025-07-09 11:17:37 +08:00
Zhou Xiao
6a650312d4 change(ble): [AUTO_MR] Update lib_esp32h2 to ca6c20bc 2025-07-09 11:17:37 +08:00
Island
d73e172d31 Merge branch 'feat/ble_log_spi_out_dev_phase_4' into 'master' 
BLE Log SPI Out Dev Phase 4

Closes BLERP-2033, BLERP-2032, BLERP-2014, BLERP-2019, BLERP-2016, and BLERP-2015

See merge request espressif/esp-idf!40190
 2025-07-08 14:01:59 +08:00
Island
652fe76dca Merge branch 'bugfix/fix_some_ble_bugs_250610_cjh_esp32c3' into 'master' 
Fixed some BLE bugs 250220 on esp32c3(2edb0b0)

Closes BLERP-1961, BLERP-1963, BLERP-1967, BLERP-1986, and BLERP-1973

See merge request espressif/esp-idf!39798
 2025-07-08 11:40:37 +08:00
Zhou Xiao
b8b7e153a7 fix(ble): update error code in controller init for ESP32-S3/ESP32-C3 2025-07-07 18:57:02 +08:00
Zhou Xiao
6ac541aa4a fix(ble): fixed controller log api call for ESP32-C3/ESP32-S3 2025-07-07 18:57:02 +08:00
gongyantao
16f87fb8c8 fix(bt): fixed the incorrect unit of clk in cpb rx event 2025-07-04 14:29:02 +08:00
Island
63f7d7eadf Merge branch 'bugfix/fix_ble_aa_check_v2' into 'master' 
Optimize check Access Address when receive connection request PDU

Closes BLERP-2036

See merge request espressif/esp-idf!40162
 2025-07-04 14:03:44 +08:00
zhanghaipeng
a663a87fe0 fix(bt/ble): Update esp32 libbtdm_app.a (3a27e2e) 
- Optimize check Access Address when receive connection request PDU
 2025-07-03 10:26:48 +08:00
Wang Meng Yang
0e92b38244 Merge branch 'bugfix/bt_sleep_log_consistent' into 'master' 
fix(ble): keep the log of the bluetooth sleep clock source consistent

See merge request espressif/esp-idf!40281
 2025-07-02 17:32:27 +08:00
xiongweichao
c2d666a6d9 fix(ble): keep the log of the bluetooth sleep clock source consistent 2025-07-01 19:17:20 +08:00
chenjianhua
ad71a2cd33 fix(bt): Update bt lib for ESP32-C3 and ESP32-S3(2edb0b0) 
- Fixed TX issue when the event is aborted
- Fixed BLE assert llc_llcp.c 487
- Fixed BLE assert sch_prog.c 304
- Fixed anonymous extended adv reporting
- Support vendor HCI related params reset
 2025-07-01 16:18:09 +08:00
Zhou Xiao
cbe6f68d3c fix(ble): ensure ble controller disable safety for ESP32-C2 2025-07-01 10:45:36 +08:00
zwl
6fac09d0c3 change(ble): [AUTO_MR] Update lib_esp32c2 to 9af627ef 2025-06-30 21:43:42 +08:00
zwl
736cd84967 change(ble): [AUTO_MR] Update lib_esp32c6 to d2d70d40 2025-06-30 21:43:42 +08:00
zwl
8d55aca9e7 change(ble): [AUTO_MR] Update lib_esp32c5 to d2d70d40 2025-06-30 21:43:41 +08:00
zwl
1671932345 change(ble): [AUTO_MR] Update lib_esp32h2 to d2d70d40 2025-06-30 21:43:41 +08:00
cjin
e44f1373a0 feat(ble): add sm count reserve cnt setting on ESP32-H2 2025-06-26 14:54:53 +08:00
cjin
ab92fef5be feat(ble): add sm count reserve cnt setting on ESP32-C6 and ESP32-C61 2025-06-26 14:54:53 +08:00
cjin
3d96faae5d feat(ble): add sm count reserve cnt setting on ESP32-C5 2025-06-26 14:54:53 +08:00
cjin
e4238a4999 change(ble): update lib_esp32c6 and esp32c61 to ea6c58c7 2025-06-25 18:11:18 +08:00
cjin
aa95e30435 change(ble): update lib_esp32h2 to ea6c58c7 2025-06-25 18:11:18 +08:00
cjin
0c3a5db115 change(ble): update lib_esp32c5 to ea6c58c7 2025-06-25 18:11:18 +08:00
Zhou Xiao
c05688fe6b change(ble): [AUTO_MR] Update lib_esp32c2 to e865b4f9 2025-06-25 18:11:18 +08:00
Zhou Xiao
2076e4411c change(ble): [AUTO_MR] Update lib_esp32c6 to b8770ab2 2025-06-25 18:11:18 +08:00
Zhou Xiao
0d7c254bd3 change(ble): [AUTO_MR] Update lib_esp32c5 to b8770ab2 2025-06-25 18:11:18 +08:00
Zhou Xiao
3b66fc2465 change(ble): [AUTO_MR] Update lib_esp32h2 to b8770ab2 2025-06-25 18:11:18 +08:00
Sudeep Mohanty
7023f5bf3c Merge branch 'contrib/github_pr_16040' into 'master' 
refactor(xtensa): Rename specreg.h register macros (GitHub PR)

Closes IDFGH-11606 and IDFGH-15386

See merge request espressif/esp-idf!39649
 2025-06-20 08:51:33 +02:00
liqigan
b5d1c978b3 fix(bt/controller): Fixed bugs on LMP legacy and secure authentication collision 2025-06-19 20:30:35 +08:00
Nebojsa Cvetkovic
d0ceef20f4 refactor(xtensa): Rename specreg.h register macros 
This commit renames all registers in xtensa/specreg.h to by adding the
prefix XT_REG_. This is done to avoid naming collisions with similar
variable names. A new register file, viz., xt_specreg.h is created. The
previous names are still available to use but have been deprecated.

Closes https://github.com/espressif/esp-idf/issues/12723
Merges https://github.com/espressif/esp-idf/pull/16040
 2025-06-17 15:37:33 +02:00
wuzhenghui
2d2aac017a change(bt): increase BTDM_MODEM_WAKE_UP_DELAY 2025-06-13 20:38:47 +08:00
Island
f1dd6da8a3 Merge branch 'bugfix/fix_ble_init_exception' into 'master' 
Fixed double free exception during BLE init under low memory

Closes BLERP-1954

See merge request espressif/esp-idf!39680
 2025-06-09 14:38:32 +08:00
cjin
a10696d7e1 fix(ble): change the default ble cca thresh on ESP32-C2 2025-06-06 17:57:35 +08:00
cjin
a2fab0ad60 fix(ble): change the default ble cca thresh on ESP32-H2 2025-06-06 17:57:04 +08:00
cjin
581521526b fix(ble): change the default ble cca thresh on ESP32-C6 2025-06-06 17:56:55 +08:00