morris
6f992acf31
feat(mipi): fine tune DPHY PLL clock
2024-11-29 10:04:38 +08:00
laokaiyao
5b03fff32e
feat(clock): support apll clock on p4
2024-10-31 11:01:04 +08:00
Xiao Xufeng
cbcd346171
feat(esp32p4): add eco1 revision config option
2024-05-11 11:46:08 +08:00
chaijie@espressif.com
f1d1dfd1ef
feat(esp32p4_eco1): modify cpll and spll config
2024-05-11 11:43:24 +08:00
wuzhenghui
ffd5d1fd66
feat(esp_hw_support): support set clock divider for esp32p4 clock output
2024-04-17 15:09:54 +08:00
wuzhenghui
309725fcd0
feat(esp_hw_support): support esp32p4 clock output
2024-04-17 15:09:49 +08:00
Armando
62440e5b12
change(psram): update voltage configurations
2024-02-29 10:42:37 +08:00
Song Ruo Jing
cf93777077
refactor(rtc): move soc/rtc.h from soc to esp_hw_support component
...
Deprecated rtc_xtal_freq_t, replaced with soc_xtal_freq_t defined in
clk_tree_defs.h in soc component.
2024-01-25 19:15:33 +08:00
Song Ruo Jing
7f2b85b82b
feat(clk): add basic clock support for esp32p4
...
- Support CPU frequency 360MHz
- Support SOC ROOT clock source switch
- Support LP SLOW clock source switch
- Support clock calibration
2023-12-29 00:37:26 +08:00
Armando
58d222e66c
change(mpll): use fast write as reg is 8bit
2023-12-26 11:43:33 +08:00
Armando
27b1e4dc87
feat(mpll): supported mpll configure ll api
2023-12-21 16:26:03 +08:00
laokaiyao
72a0746e62
refactor(apll): move the apll soc caps to clk_tree_ll
2023-09-28 15:03:27 +08:00
Planck (Lu Zeyu)
255d499884
fix(ll): fix cpp compile error
...
Merges https://github.com/espressif/esp-idf/pull/12093
fix(ll): remove FLAG_ATTR macro
Such kind of operator overload will not work because C++ thinks such overload is ambiguous and it still prefer the built-in one which accepts and returns integer. Manually force type conversion seems to be unavoidable.
2023-09-14 14:48:12 +08:00
Armando
706d684418
feat(esp32p4): introduced new target esp32p4, supported hello_world
2023-08-09 19:33:25 +08:00
Armando
ea05ae6af2
feat(esp32p4): added hal support
2023-07-10 16:11:47 +08:00
