PMP configurations for load and store addresses may
have different permissions (e.g., "R" vs. "RW").
Due to the timing alignment of internal signals, the address
permission check may be incorrectly applied during the second
part of a misaligned access transaction.
As a workaround, insert two instructions (e.g. ADDI/NOP) between
accessing to different memory regions. This spacing avoids the
false permission check caused by signal timing overlap.
This option replaces implementations of functions from ROM:
- memcpy
- memcmp
- memmove
- str[n]cpy
- str[n]cmp
The functions used in the firmware will be better optimized for misaligned
memory. Here are some measurements in CPU cycles for 4096-byte buffers:
memcpy: 28676 -> 4128
memcmp: 49147 -> 14259
memmove: 33896 -> 8086
strcpy: 32771 -> 17313
strcmp: 32775 -> 13191
