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3 Commits

Author SHA1 Message Date
Omar Chebib
8ca191e4c1 fix(esp32p4): Fixed interrupt handling to use the CLIC controller 2023-08-31 12:16:08 +08:00
Alexey Lapshin
4df3ff619e feat(esp_system): implement hw stack guard for riscv chips 
- add hardware stack guard based on assist-debug module
- enable hardware stack guard by default
- disable hardware stack guard for freertos ci.release test
- refactor rtos_int_enter/rtos_int_exit to change SP register inside them
- fix panic_reason.h header for RISC-V
- update docs to include information about the new feature
 2023-07-01 16:27:40 +00:00
Sudeep Mohanty
8fd953c627 freertos-smp: add support for RISC-V targets oon FreeRTOS SMP 
TBD: Initial commit. Enables risc-v port.
 2022-06-13 13:34:21 +02:00