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4 Commits

Author SHA1 Message Date
Sachin Parekh
c0a33487b1 gdbstub_xtensa.c: Replace with cpu_ll_pc_to_ptr macro 
Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
 2020-05-08 18:35:48 +05:30
Renz Bagaporo
d5085010c8 soc: put hal function to get core id in IRAM 2020-03-24 22:50:51 +08:00
morris
8b6c0947c7 soc: add hal api to set exception vector table base address 2020-03-06 20:23:30 +08:00
Renz Christian Bagaporo
c9a51bfbb2 soc: create abstraction for cpu related operations 2020-02-27 07:14:19 +05:00