Commit Graph

19 Commits

Author SHA1 Message Date
morris
bfc29da19a feat(rmt): add driver support on esp32c5
MP version
2024-05-23 11:23:14 +08:00
morris
14b7db5dd0 feat(rmt): support calling rmt_receive in ISR callback 2023-11-03 15:42:56 +08:00
morris
6bb05cccdd feat(rmt): add driver support for esp32p4
including DMA feature
2023-09-19 12:54:14 +08:00
morris
9ae742eb85 rmt: check filter and idle threashold
Closes https://github.com/espressif/esp-idf/issues/11262
2023-04-29 06:51:35 +00:00
morris
b562754a2f rmt: support esp32c6 2022-09-17 04:56:49 +00:00
morris
6f2ac1ce2a rmt: add iram safe test
Closes https://github.com/espressif/esp-idf/issues/9487
2022-08-12 11:30:14 +08:00
morris
a5a171926b rmt: add test with -O0 2022-08-02 23:07:06 +08:00
songruojing
a5b09cf015 rtc_clk: Clean up some clock related enum and macro in soc/rtc.h, replace with new ones in
soc/clk_tree_defs.h
2022-05-24 22:59:41 +08:00
morris
4280164be4 rmt: add more clock source caps 2022-04-21 13:59:47 +00:00
morris
f32a89826c clk_tree: added default clock source for peripheral 2022-04-14 15:44:56 +08:00
morris
9f55712c03 rmt: document and improve LL driver 2022-03-09 10:58:12 +08:00
morris
8cdcb4e291 rmt: move RMT item definition from soc to driver 2022-01-06 21:43:12 +08:00
SalimTerryLi
874a720286 soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
update all struct headers to be more "standardized":

- bit fields are properly wrapped with struct
- bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits
- bit field should be uint32_t
- typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199

added helper macros to force peripheral registers being accessed in 32 bitwidth

added a check script into ci
2021-08-30 13:50:58 +08:00
morris
a1494809b2 rmt: clean up LL driver 2021-06-22 15:29:11 +08:00
morris
7b37158ede rmt: distinguish group and channel in HAL layer 2021-02-25 12:42:23 +08:00
morris
ff976867b3 rmt: split TX and RX in LL driver
Split TX and RX function in LL driver.
Channel number is encoded in driver layer.
Added channel signal list in periph.c
2020-11-05 19:00:55 +08:00
chenjianqiang
9465af0066 rmt: support esp32s3 2020-11-05 19:00:55 +08:00
Michael (XIAO Xufeng)
647dea9395 soc: combine xxx_caps.h into one soc_caps.h
During HAL layer refactoring and new chip bringup, we have several
caps.h for each part, to reduce the conflicts to minimum. But this is
The capabilities headers will be relataive stable once completely
written (maybe after the featues are supported by drivers).

Now ESP32 and ESP32-S2 drivers are relative stable, making it a good
time to combine all these caps.h into one soc_caps.h

This cleanup also move HAL config and pin config into separated files,
to make the responsibilities of these headers more clear. This is
helpful for the stabilities of soc_caps.h because we want to make it
public some day.
2020-10-17 16:10:15 +08:00
Michael (XIAO Xufeng)
5425ef4ee4 hal: extract hal component from soc component 2020-09-01 13:25:32 +08:00