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9938f512f33f2daeca38dee36f2feef2da3fd42c
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4 Commits

Author SHA1 Message Date
Wangjialin
41d397cf3f Only modify headers in soc/ . 
Pass compiling under esp-idf-tests/merge_soc_tmp/merge_for_soc_headers branch.(only change some names of register and INUM).
 2016-09-14 13:47:28 +08:00
Wu Jian Gang
04b53643ef header files: clean up 
1. format;
2. Slow RTC memory reverse 2KB;
 2016-09-12 17:47:50 +08:00
jack
24011ddd05 header files: modify rom code and soc header files 
1. timer reg file for both time group 0 and time group 1, not only timer group 0
2. fix bug that io mux header file mismatch with chip
3. fix bug that some BASE address not correct
4. add some static function to eagle.fpga32.rom.addr.v7.ld
5. add interrupts usage table
6. add some comments for rom code functions
 2016-09-12 17:47:49 +08:00
Ivan Grokhotkov
bd6ea4393c Initial public version 2016-08-17 23:08:22 +08:00