Commit Graph

914 Commits

Author SHA1 Message Date
Aditya Patwardhan
a8cc5b94cb Merge branch 'bugfix/crypto_reset_on_exit_v5.1' into 'release/v5.1'
fix(esp_system): reset crypto peripherals before device restart (v5.1)

See merge request espressif/esp-idf!38478
2025-04-28 13:47:10 +08:00
Sudeep Mohanty
6401e1cb24 fix(panic_handler): Prevent race condition in panic handler
This commit updates all RTC WDT contexts to be local instead of global
to avoid race conditions when both cores enter the panic handler
simultaneously.
2025-04-23 12:54:19 +02:00
Mahavir Jain
93e0ccb2ec fix(esp_system): reset crypto peripherals before device restart
This change addresses a rare but critical issue observed on certain
ESP32-C3 and ESP32-S3 devices, where secure boot verification
intermittently fails due to improper cleanup of crypto peripherals
during a restart.

Background – Restart Behavior in IDF
------------------------------------
In ESP-IDF, when the device restarts (via `esp_restart()` or due to a
panic/exception), a partial peripheral reset is performed followed by a
CPU reset. However, until now, crypto-related peripherals were not
included in this selective reset sequence.

Problem Scenario
----------------
If a restart occurs while the application is in the middle of a bignum
operation (i.e., using the MPI/Bignum peripheral), the ROM code may
encounter an inconsistent peripheral state during the subsequent boot.
This leads to transient RSA-PSS secure boot verification failures.

Following such a failure, the ROM typically triggers a full-chip reset
via the watchdog timer (WDT). This full reset clears the crypto
peripheral state, allowing secure boot verification to succeed on the
next boot.

Risk with Aggressive Revocation
-------------------------------
If secure boot aggressive revocation is enabled (disabled by default in
IDF), this transient verification failure could mistakenly lead to
revocation of the secure boot digest.

If your product configuration has aggressive revocation enabled,
applying this fix is strongly recommended.

Frequency of Occurrence
-----------------------
The issue is rare and only occurs in corner cases involving
simultaneous use of the MPI peripheral and an immediate CPU reset.

Fix
---
This fix ensures that all crypto peripherals are explicitly reset prior
to any software-triggered restart (including panic scenarios),
guaranteeing a clean peripheral state for the next boot and preventing
incorrect secure boot behavior.
2025-04-16 20:42:14 +08:00
wuzhenghui
774548e0fe fix(esp_hw_support): fix unused OSC source deinit breaks XTAL32K configuration 2025-04-16 15:06:06 +08:00
wuzhenghui
c6731c0d53 fix(esp_hw_support): fix current leakage if ext32k slow clock source not exists 2025-04-16 15:05:57 +08:00
Marius Vikhammer
4aa92562ba Merge branch 'bug/xtensa_cpu1_sys_lockup_v5.1' into 'release/v5.1'
fix(panic_handler): Updated panic handler to use RTC WDT (v5.1)

See merge request espressif/esp-idf!37123
2025-03-12 10:00:36 +08:00
wuzhenghui
63c8fc4575 fix(esp_system): fix possible cache_error by another core accessing flash in esp_restart 2025-03-07 20:29:46 +08:00
Sudeep Mohanty
2bba3944c2 fix(panic_handler): Updated panic handler to use RTC WDT
This commit updates the following:
- Updates the panic handler to use only the RTC WDT to reset the system.
- Refactors some of the panic handler code.
- Updates Bluetooth files where in they now feed the WDTs instead of
  reconfiguring them.
- Removes some unnecessary configuration of WDTs from various files.
- Added a unit test to verify that the system does not lock up when the
  panic handler is stuck.
- Updates the memprot unit tests to work with the refactored panic
  handler.

Closes https://github.com/espressif/esp-idf/issues/15166
Closes https://github.com/espressif/esp-idf/issues/15018
Closes https://github.com/espressif/esp-idf/issues/10110
2025-03-06 09:10:09 +01:00
Jan Beran
bc55769c8b fix(esp_system): Remove unnecessary select from esp_system/Kconfig 2025-03-05 15:09:48 +01:00
Mahavir Jain
7b9f6e2f9a Merge branch 'ci/fix_pure_ram_app_v5.1' into 'release/v5.1'
ci(esp_system): Fix the `test_pure_ram_loadable_app` failure

See merge request espressif/esp-idf!36984
2025-02-24 13:52:32 +08:00
wuzhenghui
989e958256 fix(esp_hw_support): add timer wakeup sleep duration check
Closes https://github.com/espressif/esp-idf/issues/15255
2025-02-17 19:44:20 +08:00
Laukik Hase
3fc637c9cc fix(esp_system): Skip populating and checking the image header for pure RAM apps 2025-02-14 16:24:40 +05:30
Aditya Patwardhan
17836ba0f3 fix(security): Fixed the force constant time ecc mode
A regression was added through !36587 in which
    the force constant time ecc mode was not added appropriately
    The option gave compile time errors when enabled.
2025-02-10 21:19:38 +05:30
Aditya Patwardhan
09ded7787f fix(hal): Make the ECDSA countermeasure dynamically applicable
This commit makes the ECDSA countermeasure dynamically applicable
    across different revisions of the ESP32H2 SoC.
2025-01-24 09:13:24 +05:30
Mahavir Jain
58e5f48368 feat(ecc): enable ECC constant time mode for ESP32-H2 ECO5 2025-01-23 22:10:21 +05:30
laokaiyao
39279e589d refactor(lpperi): improve compatibility solution 2025-01-15 17:16:19 +08:00
laokaiyao
dce7c47e72 refactor(lpperi): compatible refactor for H2 ECO5 2025-01-15 11:49:42 +08:00
Konstantin Kondrashov
ace6ef9786 feat(espefuse): Adds efuses for esp32h2 eco5
- Support efuses that are not present in the main efuse table
2025-01-08 12:21:45 +02:00
Song Ruo Jing
9026c0905e fix(clk): add an inevitable kconfig option to be selected to use rc32k 2024-12-25 20:08:56 +08:00
Armando
218947014c fix(cache): fixed cache hal ctx not initialised in app issue 2024-12-20 10:35:11 +08:00
Erhan Kurubas
6a62f67e5e fix(espcoredump): prevent null pointer dereference in panic reason handling 2024-12-09 15:20:39 +01:00
wuzhenghui
88e3e21a9f fix(esp_system): deselect all modem modules clk source selection before clk init 2024-11-15 11:05:21 +08:00
Jiang Jiang Jian
3a24b91c8e Merge branch 'fix/fix_ota_slowclock_switching_v5.1' into 'release/v5.1'
fix(esp_hw_support): fix rtc slow clock missing after the OTA app changes the slow clock source (v5.1)

See merge request espressif/esp-idf!34471
2024-11-12 19:26:09 +08:00
Laukik Hase
8dee18faae fix(esp_system): Correct address used to fetch application image header 2024-11-04 14:12:25 +05:30
wuzhenghui
b6076491ee fix(esp_hw_support): disable unused clock sources after rtc clock switching complete 2024-10-28 19:59:15 +08:00
Jiang Jiang Jian
a13ab34101 Merge branch 'refactor/rtc_init_before_mspi_tuning_v5.1' into 'release/v5.1'
fix(startup): move rtc initialization before MSPI timing tuning to improve stability (v5.1)

See merge request espressif/esp-idf!32555
2024-09-21 15:01:16 +08:00
Xiao Xufeng
7d4d6ae5fd fix(MMU): fixed mmap deadlock when using multicore app with unicore bootloader
Closes https://github.com/espressif/esp-idf/issues/11617
2024-09-18 19:31:33 +08:00
Xiao Xufeng
dbed93dce8 fix(startup): move rtc initialization before MSPI timing tuning to improve stability 2024-09-18 19:30:22 +08:00
Chen Jichang
bec23c9d81 feat(psram): add psram noinit segment support on S2/S3/P4/C5
Closes https://github.com/espressif/esp-idf/issues/14253
2024-09-04 15:08:12 +08:00
KonstantinKondrashov
17c3f85a89 feat(ipc): Adds a new no blocking IPC call 2024-08-07 15:13:11 +03:00
wuzhenghui
563683f471 change(esp_system): trigger digital system reset in brownout isr 2024-06-24 12:07:30 +08:00
morris
d7c75b92d1 Merge branch 'bugfix/check_c3_efuse_error_on_ram_app_condition_v5.1' into 'release/v5.1'
bugfix(cpu_start): check c3 efuse error log on ram app condition (v5.1)

See merge request espressif/esp-idf!31046
2024-05-27 15:43:21 +08:00
Armando
bb51330aa6 bugfix(cpu_start): check c3 efuse error log on ram app condition
Prior to this commit, esp_efuse_check_errors() is only called when it's
2nd stage btld app.

This commit moves this error check so under all conditions (including
ram app, pure ram app) will check this efuse error
2024-05-23 15:56:08 +08:00
Marius Vikhammer
39074c031e fix(brownout): fixed brownout isr crashing if cache disabled
If a brownout ISR was triggered while cache was disabled the system would panic.

This was due to a print accessing a string stored in flash
2024-05-22 10:19:10 +08:00
Jiang Jiang Jian
a2bbd59755 Merge branch 'support/esp_sleep_enable_ext1_wakeup_io_v5.1' into 'release/v5.1'
Support/esp sleep enable ext1 wakeup io(backport v5.1)

See merge request espressif/esp-idf!30164
2024-05-13 10:42:20 +08:00
wuzhenghui
6e1659c233 fix(esp_system): increase 26Mhz esp32c2 slow clock calibration timeout watchdog threshold 2024-04-30 11:47:18 +08:00
Lou Tianhao
b8c6179355 change(pm): add ext1 new api 2024-04-15 20:33:02 +08:00
liuning
cb0fd9010b fix(clk): clear all lpclk source at clk init 2024-03-15 10:49:18 +08:00
Erhan Kurubas
5d1b6b7b99 feat(coredump): save twdt panic output to coredump elf file 2024-03-12 10:40:29 +01:00
Erhan Kurubas
7ec19d4268 refactor(espcoredump): simplify uart/flash write flow 2024-03-11 17:12:41 +08:00
Jiang Jiang Jian
f87ee9c4ec Merge branch 'bugfix/fix_c6_wakeup_access_flash_v5.1' into 'release/v5.1'
fix(hal): fix esp32c6 clock bug workaround access flash in wakeup process (v5.1)

See merge request espressif/esp-idf!29245
2024-03-05 10:58:14 +08:00
Jiang Jiang Jian
76152c80a2 Merge branch 'c6_auto_dbias_master_hsq_v5.1' into 'release/v5.1'
ESP32C6: Active & sleep dbg and dbias get from efuse to fix the voltage (v5.1)

See merge request espressif/esp-idf!28722
2024-02-28 10:49:13 +08:00
Jiang Jiang Jian
ffd34ba04a Merge branch 'bugfix/bod_threshold_v5.1' into 'release/v5.1'
fix(bod): Fix BOD threshold value on ESP32H2(backport v5.1)

See merge request espressif/esp-idf!28624
2024-02-27 19:58:51 +08:00
Mahavir Jain
7003f1ef0d Merge branch 'bugfix/ota_anti_rollback_checks_2_v5.1' into 'release/v5.1'
feat(bootloader_support): Read secure_version under sha256 protection (v5.1)

See merge request espressif/esp-idf!29060
2024-02-27 18:26:03 +08:00
wuzhenghui
54a15b81f9 feat: support cache safe assertion check in sleep process
- Add support for cache safe assertion check to ensure that code expected to be in RAM is in IRAM
2024-02-26 17:24:04 +08:00
hongshuqing
80378b809e feat(pmu): set fix voltage to different mode for esp32c6 2024-02-22 15:01:14 +08:00
Marius Vikhammer
d9a6158700 fix(system): update reset reasons for C6 and H2 2024-02-22 12:36:09 +08:00
Mahavir Jain
83ec466b26 fix(ota): additional checks for secure version in anti-rollback case
Some additional checks related to secure version of the application in
anti-rollback case have been added to avoid any attempts to boot lower
security version but valid application (e.g., passive partition image).

- Read secure_version under sha256 protection

- First check has been added in the bootloader to ensure correct secure
  version after application verification and loading stage. This check
  happens before setting up the flash cache mapping and handling over
  the final control to application. This check ensures that application
  was not swapped (e.g., to lower security version but valid image) just
  before the load stage in bootloader.

- Second check has been added in the application startup code to ensure
  that currently booting app has higher security version than the one
  programmed in the eFuse for anti-rollback scenario. This will ensure
  that only the legit application boots-up on the device for
  anti-rollback case.
2024-02-15 15:10:28 +02:00
Cao Sen Miao
bba56bc016 fix(bod): Fix BOD threshold value on ESP32H2 2024-01-23 10:13:33 +08:00
Xiao Xufeng
a055fcbda4 fix(rtc): fixed bbpll not calibrated from bootloader issue 2024-01-05 10:19:20 +08:00