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3 Commits

Author SHA1 Message Date
Song Ruo Jing
7f2b85b82b feat(clk): add basic clock support for esp32p4 
- Support CPU frequency 360MHz
- Support SOC ROOT clock source switch
- Support LP SLOW clock source switch
- Support clock calibration
 2023-12-29 00:37:26 +08:00
caixinying-git
c7dfe1bf21 docs: provide CN translation for api-reference/peripherals/clk_tree.rst 2023-09-13 15:43:09 +08:00
morris
b26cd91537 doc: added clk_tree definitions to doc 2022-05-24 22:59:51 +08:00