6 Commits

Author	SHA1	Message	Date
C.S.M	bc80476411	fix(mspi): Refactor mspi ll/soc for c5 and c61	2024-08-15 15:08:56 +08:00
Cao Sen Miao	2e83fa1c69	refactor(spi_flash): Use new spi_flash register sturct and deperecate the old one	2024-01-08 09:59:22 +08:00
Cao Sen Miao	c147a6d022	fix(spi_flash): Fix spi_flash write fail on 26M C2(including OTA fail on this chip)	2023-09-07 17:30:15 +08:00
Cao Sen Miao	ed96dadd06	spi_flash: 2nd stage for supporting flash suspend. (1). Support more esp chips (2). Improve real-time performance (3). Making timing more stable (4) Add documents	2023-05-11 20:10:30 +08:00
Cao Sen Miao	d9f01ed43c	spi_flash: bringup for esp32c6	2022-11-09 12:50:46 +08:00
wuzhenghui	1d299a8976	esp32c6: add hal support	2022-09-01 12:37:51 +08:00